Search

Arezoo Sherkat

Examiner (ID: 12013)

Most Active Art Unit
2434
Art Unit(s)
2494, IPBS, 2431, 2131, 2434
Total Applications
370
Issued Applications
274
Pending Applications
15
Abandoned Applications
81

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7485046 [patent_doc_number] => 20110235394 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-29 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/033151 [patent_app_country] => US [patent_app_date] => 2011-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10682 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20110235394.pdf [firstpage_image] =>[orig_patent_app_number] => 13033151 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/033151
Semiconductor memory device Feb 22, 2011 Issued
Array ( [id] => 8803572 [patent_doc_number] => 08441851 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-14 [patent_title] => 'Semiconductor storage circuit' [patent_app_type] => utility [patent_app_number] => 13/033181 [patent_app_country] => US [patent_app_date] => 2011-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 33 [patent_no_of_words] => 11087 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 550 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13033181 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/033181
Semiconductor storage circuit Feb 22, 2011 Issued
Array ( [id] => 8631383 [patent_doc_number] => 08363468 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-29 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 13/033309 [patent_app_country] => US [patent_app_date] => 2011-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 21 [patent_no_of_words] => 8691 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13033309 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/033309
Semiconductor memory device Feb 22, 2011 Issued
Array ( [id] => 5957731 [patent_doc_number] => 20110182118 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-28 [patent_title] => 'ADAPTIVE DYNAMIC READING OF FLASH MEMORIES' [patent_app_type] => utility [patent_app_number] => 13/031221 [patent_app_country] => US [patent_app_date] => 2011-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10391 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0182/20110182118.pdf [firstpage_image] =>[orig_patent_app_number] => 13031221 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/031221
Adaptive dynamic reading of flash memories Feb 19, 2011 Issued
Array ( [id] => 6044763 [patent_doc_number] => 20110205775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-25 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/027543 [patent_app_country] => US [patent_app_date] => 2011-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 24755 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20110205775.pdf [firstpage_image] =>[orig_patent_app_number] => 13027543 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/027543
Semiconductor device Feb 14, 2011 Issued
Array ( [id] => 8447735 [patent_doc_number] => 08289794 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-16 [patent_title] => 'Integrated circuit' [patent_app_type] => utility [patent_app_number] => 13/009131 [patent_app_country] => US [patent_app_date] => 2011-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4203 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13009131 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/009131
Integrated circuit Jan 18, 2011 Issued
Array ( [id] => 8307186 [patent_doc_number] => 08228731 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-24 [patent_title] => 'Random access memory with CMOS-compatible nonvolatile storage element and parallel storage capacitor' [patent_app_type] => utility [patent_app_number] => 13/009697 [patent_app_country] => US [patent_app_date] => 2011-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4099 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13009697 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/009697
Random access memory with CMOS-compatible nonvolatile storage element and parallel storage capacitor Jan 18, 2011 Issued
Array ( [id] => 7490493 [patent_doc_number] => 20110252206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-13 [patent_title] => 'MEMORY PROGRAMMING USING VARIABLE DATA WIDTH' [patent_app_type] => utility [patent_app_number] => 13/008522 [patent_app_country] => US [patent_app_date] => 2011-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4556 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0252/20110252206.pdf [firstpage_image] =>[orig_patent_app_number] => 13008522 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/008522
Memory programming using variable data width Jan 17, 2011 Issued
Array ( [id] => 9021893 [patent_doc_number] => 08531883 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-09-10 [patent_title] => 'Managing data writing to memories' [patent_app_type] => utility [patent_app_number] => 12/985265 [patent_app_country] => US [patent_app_date] => 2011-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7101 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12985265 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/985265
Managing data writing to memories Jan 4, 2011 Issued
Array ( [id] => 9114637 [patent_doc_number] => 08570822 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-29 [patent_title] => 'Semiconductor memory and semiconductor memory test method' [patent_app_type] => utility [patent_app_number] => 12/978775 [patent_app_country] => US [patent_app_date] => 2010-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10511 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12978775 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/978775
Semiconductor memory and semiconductor memory test method Dec 26, 2010 Issued
Array ( [id] => 8353561 [patent_doc_number] => 08248884 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-21 [patent_title] => 'Method of controlling a memory device having multiple power modes' [patent_app_type] => utility [patent_app_number] => 12/975322 [patent_app_country] => US [patent_app_date] => 2010-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4023 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12975322 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/975322
Method of controlling a memory device having multiple power modes Dec 20, 2010 Issued
Array ( [id] => 9240728 [patent_doc_number] => 08605525 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-10 [patent_title] => 'System and method for testing for defects in a semiconductor memory array' [patent_app_type] => utility [patent_app_number] => 12/953213 [patent_app_country] => US [patent_app_date] => 2010-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4111 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12953213 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/953213
System and method for testing for defects in a semiconductor memory array Nov 22, 2010 Issued
Array ( [id] => 5997814 [patent_doc_number] => 20110115540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-19 [patent_title] => 'SELF-POWERED DETECTION DEVICE WITH A NON-VOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 12/945203 [patent_app_country] => US [patent_app_date] => 2010-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9735 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20110115540.pdf [firstpage_image] =>[orig_patent_app_number] => 12945203 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/945203
Self-powered detection device with a non-volatile memory Nov 11, 2010 Issued
Array ( [id] => 7485145 [patent_doc_number] => 20110235427 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-29 [patent_title] => 'Channel Hot Electron Injection Programming Method and Related Device' [patent_app_type] => utility [patent_app_number] => 12/944711 [patent_app_country] => US [patent_app_date] => 2010-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 4181 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20110235427.pdf [firstpage_image] =>[orig_patent_app_number] => 12944711 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/944711
Channel hot electron injection programming method and related device Nov 10, 2010 Issued
Array ( [id] => 8365124 [patent_doc_number] => 08254194 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-28 [patent_title] => 'Sense amplifier with reduced area occupation for semiconductor memories' [patent_app_type] => utility [patent_app_number] => 12/911575 [patent_app_country] => US [patent_app_date] => 2010-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6323 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12911575 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/911575
Sense amplifier with reduced area occupation for semiconductor memories Oct 24, 2010 Issued
Array ( [id] => 7802307 [patent_doc_number] => 08130584 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-06 [patent_title] => 'Semiconductor device and control method of the same' [patent_app_type] => utility [patent_app_number] => 12/905716 [patent_app_country] => US [patent_app_date] => 2010-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 11561 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/130/08130584.pdf [firstpage_image] =>[orig_patent_app_number] => 12905716 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/905716
Semiconductor device and control method of the same Oct 14, 2010 Issued
Array ( [id] => 5957729 [patent_doc_number] => 20110182116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-28 [patent_title] => 'SEMICONDUCTOR DEVICE AND CONTROL METHOD OF THE SAME' [patent_app_type] => utility [patent_app_number] => 12/901990 [patent_app_country] => US [patent_app_date] => 2010-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11574 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0182/20110182116.pdf [firstpage_image] =>[orig_patent_app_number] => 12901990 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/901990
Semiconductor device and control method of the same Oct 10, 2010 Issued
Array ( [id] => 9456820 [patent_doc_number] => 08717838 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-05-06 [patent_title] => 'Method and apparatus for memory redundancy' [patent_app_type] => utility [patent_app_number] => 12/899087 [patent_app_country] => US [patent_app_date] => 2010-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6049 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12899087 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/899087
Method and apparatus for memory redundancy Oct 5, 2010 Issued
Array ( [id] => 9061318 [patent_doc_number] => 08547761 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-01 [patent_title] => 'Memory module and memory system comprising memory module' [patent_app_type] => utility [patent_app_number] => 12/897189 [patent_app_country] => US [patent_app_date] => 2010-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 5765 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12897189 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/897189
Memory module and memory system comprising memory module Oct 3, 2010 Issued
Array ( [id] => 8579283 [patent_doc_number] => 08345503 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-01 [patent_title] => 'Booster circuit and semiconductor memory' [patent_app_type] => utility [patent_app_number] => 12/892251 [patent_app_country] => US [patent_app_date] => 2010-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7028 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12892251 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/892251
Booster circuit and semiconductor memory Sep 27, 2010 Issued
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