
Arezoo Sherkat
Examiner (ID: 12013)
| Most Active Art Unit | 2434 |
| Art Unit(s) | 2494, IPBS, 2431, 2131, 2434 |
| Total Applications | 370 |
| Issued Applications | 274 |
| Pending Applications | 15 |
| Abandoned Applications | 81 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6276740
[patent_doc_number] => 20100118624
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-05-13
[patent_title] => 'READ CIRCUIT FOR SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/614909
[patent_app_country] => US
[patent_app_date] => 2009-11-09
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[pdf_file] => publications/A1/0118/20100118624.pdf
[firstpage_image] =>[orig_patent_app_number] => 12614909
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/614909 | Read circuit for semiconductor memory device and semiconductor memory device | Nov 8, 2009 | Issued |
Array
(
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[patent_doc_number] => 20100110803
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-05-06
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE THAT CAN PERFORM SUCCESSIVE ACCESSES'
[patent_app_type] => utility
[patent_app_number] => 12/614129
[patent_app_country] => US
[patent_app_date] => 2009-11-06
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[firstpage_image] =>[orig_patent_app_number] => 12614129
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/614129 | Semiconductor memory device that can perform successive accesses | Nov 5, 2009 | Issued |
Array
(
[id] => 6543463
[patent_doc_number] => 20100044666
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-02-25
[patent_title] => 'RESISTIVE MEMORY CELLS AND DEVICES HAVING ASYMMETRICAL CONTACTS'
[patent_app_type] => utility
[patent_app_number] => 12/612187
[patent_app_country] => US
[patent_app_date] => 2009-11-04
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[firstpage_image] =>[orig_patent_app_number] => 12612187
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/612187 | Resistive memory cells and devices having asymmetrical contacts | Nov 3, 2009 | Issued |
Array
(
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[patent_kind] => B2
[patent_issue_date] => 2011-02-01
[patent_title] => 'Memory device having multiple power modes'
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[patent_app_number] => 12/608209
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Array
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Array
(
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/608209 | Memory device having multiple power modes | Oct 28, 2009 | Issued |
Array
(
[id] => 6473496
[patent_doc_number] => 20100041194
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-02-18
[patent_title] => 'SEMICONDUCTOR DEVICE WITH SPLIT GATE MEMORY CELL AND FABRICATION METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/603779
[patent_app_country] => US
[patent_app_date] => 2009-10-22
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[pdf_file] => publications/A1/0041/20100041194.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/603779 | Semiconductor device with split gate memory cell and fabrication method thereof | Oct 21, 2009 | Issued |
Array
(
[id] => 8353530
[patent_doc_number] => 08248869
[patent_country] => US
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[patent_issue_date] => 2012-08-21
[patent_title] => 'Configurable memory map interface and method of implementing a configurable memory map interface'
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[patent_app_number] => 12/581099
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/581099 | Configurable memory map interface and method of implementing a configurable memory map interface | Oct 15, 2009 | Issued |
| 12/576080 | FLASH MEMORY DEVICE WITH IMPROVED PROGRAMMING PERFORMANCE | Oct 7, 2009 | Abandoned |
Array
(
[id] => 6342954
[patent_doc_number] => 20100020598
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[patent_issue_date] => 2010-01-28
[patent_title] => 'SEMICONDUCTOR DEVICE AND CONTROL METHOD OF THE SAME'
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[patent_app_number] => 12/574427
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Array
(
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Array
(
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[patent_title] => 'VOLATILE MEMORY ELEMENTS WITH SOFT ERROR UPSET IMMUNITY'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/571143 | Volatile memory elements with soft error upset immunity | Sep 29, 2009 | Issued |
Array
(
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[patent_title] => 'Flash memory device and method of testing the flash memory device'
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Array
(
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Array
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Array
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Array
(
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Array
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/558627 | Method analyzing threshold voltage distribution in nonvolatile memory | Sep 13, 2009 | Issued |