Search

Arezoo Sherkat

Examiner (ID: 12013)

Most Active Art Unit
2434
Art Unit(s)
2494, IPBS, 2431, 2131, 2434
Total Applications
370
Issued Applications
274
Pending Applications
15
Abandoned Applications
81

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6276740 [patent_doc_number] => 20100118624 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-13 [patent_title] => 'READ CIRCUIT FOR SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/614909 [patent_app_country] => US [patent_app_date] => 2009-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4480 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0118/20100118624.pdf [firstpage_image] =>[orig_patent_app_number] => 12614909 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/614909
Read circuit for semiconductor memory device and semiconductor memory device Nov 8, 2009 Issued
Array ( [id] => 6310176 [patent_doc_number] => 20100110803 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-06 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE THAT CAN PERFORM SUCCESSIVE ACCESSES' [patent_app_type] => utility [patent_app_number] => 12/614129 [patent_app_country] => US [patent_app_date] => 2009-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 47 [patent_no_of_words] => 29736 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20100110803.pdf [firstpage_image] =>[orig_patent_app_number] => 12614129 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/614129
Semiconductor memory device that can perform successive accesses Nov 5, 2009 Issued
Array ( [id] => 6543463 [patent_doc_number] => 20100044666 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-25 [patent_title] => 'RESISTIVE MEMORY CELLS AND DEVICES HAVING ASYMMETRICAL CONTACTS' [patent_app_type] => utility [patent_app_number] => 12/612187 [patent_app_country] => US [patent_app_date] => 2009-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 11080 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20100044666.pdf [firstpage_image] =>[orig_patent_app_number] => 12612187 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/612187
Resistive memory cells and devices having asymmetrical contacts Nov 3, 2009 Issued
Array ( [id] => 4465111 [patent_doc_number] => 07881151 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-01 [patent_title] => 'Memory device having multiple power modes' [patent_app_type] => utility [patent_app_number] => 12/608209 [patent_app_country] => US [patent_app_date] => 2009-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 3993 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/881/07881151.pdf [firstpage_image] =>[orig_patent_app_number] => 12608209 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/608209
Memory device having multiple power modes Oct 28, 2009 Issued
Array ( [id] => 4465111 [patent_doc_number] => 07881151 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-01 [patent_title] => 'Memory device having multiple power modes' [patent_app_type] => utility [patent_app_number] => 12/608209 [patent_app_country] => US [patent_app_date] => 2009-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 3993 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/881/07881151.pdf [firstpage_image] =>[orig_patent_app_number] => 12608209 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/608209
Memory device having multiple power modes Oct 28, 2009 Issued
Array ( [id] => 4465111 [patent_doc_number] => 07881151 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-01 [patent_title] => 'Memory device having multiple power modes' [patent_app_type] => utility [patent_app_number] => 12/608209 [patent_app_country] => US [patent_app_date] => 2009-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 3993 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/881/07881151.pdf [firstpage_image] =>[orig_patent_app_number] => 12608209 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/608209
Memory device having multiple power modes Oct 28, 2009 Issued
Array ( [id] => 4465111 [patent_doc_number] => 07881151 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-01 [patent_title] => 'Memory device having multiple power modes' [patent_app_type] => utility [patent_app_number] => 12/608209 [patent_app_country] => US [patent_app_date] => 2009-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 3993 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/881/07881151.pdf [firstpage_image] =>[orig_patent_app_number] => 12608209 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/608209
Memory device having multiple power modes Oct 28, 2009 Issued
Array ( [id] => 6473496 [patent_doc_number] => 20100041194 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-18 [patent_title] => 'SEMICONDUCTOR DEVICE WITH SPLIT GATE MEMORY CELL AND FABRICATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/603779 [patent_app_country] => US [patent_app_date] => 2009-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3961 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0041/20100041194.pdf [firstpage_image] =>[orig_patent_app_number] => 12603779 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/603779
Semiconductor device with split gate memory cell and fabrication method thereof Oct 21, 2009 Issued
Array ( [id] => 8353530 [patent_doc_number] => 08248869 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-08-21 [patent_title] => 'Configurable memory map interface and method of implementing a configurable memory map interface' [patent_app_type] => utility [patent_app_number] => 12/581099 [patent_app_country] => US [patent_app_date] => 2009-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 9527 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12581099 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/581099
Configurable memory map interface and method of implementing a configurable memory map interface Oct 15, 2009 Issued
12/576080 FLASH MEMORY DEVICE WITH IMPROVED PROGRAMMING PERFORMANCE Oct 7, 2009 Abandoned
Array ( [id] => 6342954 [patent_doc_number] => 20100020598 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-28 [patent_title] => 'SEMICONDUCTOR DEVICE AND CONTROL METHOD OF THE SAME' [patent_app_type] => utility [patent_app_number] => 12/574427 [patent_app_country] => US [patent_app_date] => 2009-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10368 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20100020598.pdf [firstpage_image] =>[orig_patent_app_number] => 12574427 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/574427
Semiconductor device and control method of the same Oct 5, 2009 Issued
Array ( [id] => 6341169 [patent_doc_number] => 20100020214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-28 [patent_title] => 'SEMICONDUCTOR DEVICE AND CONTROL METHOD OF THE SAME' [patent_app_type] => utility [patent_app_number] => 12/574413 [patent_app_country] => US [patent_app_date] => 2009-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10368 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20100020214.pdf [firstpage_image] =>[orig_patent_app_number] => 12574413 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/574413
Semiconductor device and control method of the same Oct 5, 2009 Issued
Array ( [id] => 6368069 [patent_doc_number] => 20100080033 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-01 [patent_title] => 'VOLATILE MEMORY ELEMENTS WITH SOFT ERROR UPSET IMMUNITY' [patent_app_type] => utility [patent_app_number] => 12/571143 [patent_app_country] => US [patent_app_date] => 2009-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7989 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20100080033.pdf [firstpage_image] =>[orig_patent_app_number] => 12571143 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/571143
Volatile memory elements with soft error upset immunity Sep 29, 2009 Issued
Array ( [id] => 8084589 [patent_doc_number] => 08149621 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-03 [patent_title] => 'Flash memory device and method of testing the flash memory device' [patent_app_type] => utility [patent_app_number] => 12/585725 [patent_app_country] => US [patent_app_date] => 2009-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5063 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 313 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/149/08149621.pdf [firstpage_image] =>[orig_patent_app_number] => 12585725 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/585725
Flash memory device and method of testing the flash memory device Sep 22, 2009 Issued
Array ( [id] => 8271694 [patent_doc_number] => 08213210 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-03 [patent_title] => 'Magnetic shift register and reading method' [patent_app_type] => utility [patent_app_number] => 12/564925 [patent_app_country] => US [patent_app_date] => 2009-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 5768 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12564925 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/564925
Magnetic shift register and reading method Sep 22, 2009 Issued
Array ( [id] => 7507138 [patent_doc_number] => 08036017 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-11 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 12/563349 [patent_app_country] => US [patent_app_date] => 2009-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 33 [patent_no_of_words] => 10951 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/036/08036017.pdf [firstpage_image] =>[orig_patent_app_number] => 12563349 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/563349
Semiconductor memory device Sep 20, 2009 Issued
Array ( [id] => 6517862 [patent_doc_number] => 20100014366 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-21 [patent_title] => 'Semiconductor memory devices having signal delay controller and methods performed therein' [patent_app_type] => utility [patent_app_number] => 12/585636 [patent_app_country] => US [patent_app_date] => 2009-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5999 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20100014366.pdf [firstpage_image] =>[orig_patent_app_number] => 12585636 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/585636
Semiconductor memory devices having signal delay controller and methods performed therein Sep 20, 2009 Issued
Array ( [id] => 4521170 [patent_doc_number] => 07933148 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-26 [patent_title] => 'Memory' [patent_app_type] => utility [patent_app_number] => 12/562724 [patent_app_country] => US [patent_app_date] => 2009-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 11663 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/933/07933148.pdf [firstpage_image] =>[orig_patent_app_number] => 12562724 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/562724
Memory Sep 17, 2009 Issued
Array ( [id] => 8330070 [patent_doc_number] => 08238137 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-07 [patent_title] => 'Ferroelectric random access memory device' [patent_app_type] => utility [patent_app_number] => 12/562051 [patent_app_country] => US [patent_app_date] => 2009-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6145 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12562051 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/562051
Ferroelectric random access memory device Sep 16, 2009 Issued
Array ( [id] => 7765481 [patent_doc_number] => 08116141 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-14 [patent_title] => 'Method analyzing threshold voltage distribution in nonvolatile memory' [patent_app_type] => utility [patent_app_number] => 12/558627 [patent_app_country] => US [patent_app_date] => 2009-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8716 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/116/08116141.pdf [firstpage_image] =>[orig_patent_app_number] => 12558627 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/558627
Method analyzing threshold voltage distribution in nonvolatile memory Sep 13, 2009 Issued
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