Search

Arezoo Sherkat

Examiner (ID: 12013)

Most Active Art Unit
2434
Art Unit(s)
2494, IPBS, 2431, 2131, 2434
Total Applications
370
Issued Applications
274
Pending Applications
15
Abandoned Applications
81

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5105598 [patent_doc_number] => 20070064473 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-22 [patent_title] => 'Phase change memory device and program method thereof' [patent_app_type] => utility [patent_app_number] => 11/319373 [patent_app_country] => US [patent_app_date] => 2005-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4538 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0064/20070064473.pdf [firstpage_image] =>[orig_patent_app_number] => 11319373 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/319373
Phase change memory device and program method thereof Dec 28, 2005 Issued
Array ( [id] => 592155 [patent_doc_number] => 07450442 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-11 [patent_title] => 'Semiconductor memory device with increased domain crossing margin' [patent_app_type] => utility [patent_app_number] => 11/322281 [patent_app_country] => US [patent_app_date] => 2005-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3905 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/450/07450442.pdf [firstpage_image] =>[orig_patent_app_number] => 11322281 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/322281
Semiconductor memory device with increased domain crossing margin Dec 28, 2005 Issued
Array ( [id] => 380678 [patent_doc_number] => 07310255 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-18 [patent_title] => 'Non-volatile memory with improved program-verify operations' [patent_app_type] => utility [patent_app_number] => 11/323577 [patent_app_country] => US [patent_app_date] => 2005-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 41 [patent_no_of_words] => 14083 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/310/07310255.pdf [firstpage_image] =>[orig_patent_app_number] => 11323577 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/323577
Non-volatile memory with improved program-verify operations Dec 28, 2005 Issued
Array ( [id] => 5158706 [patent_doc_number] => 20070171750 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-26 [patent_title] => 'Apparatus and method for self-refreshing dynamic random access memory cells' [patent_app_type] => utility [patent_app_number] => 11/319451 [patent_app_country] => US [patent_app_date] => 2005-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 10687 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20070171750.pdf [firstpage_image] =>[orig_patent_app_number] => 11319451 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/319451
Apparatus and method for self-refreshing dynamic random access memory cells Dec 28, 2005 Issued
Array ( [id] => 94656 [patent_doc_number] => 07733704 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-08 [patent_title] => 'Non-volatile memory with power-saving multi-pass sensing' [patent_app_type] => utility [patent_app_number] => 11/323569 [patent_app_country] => US [patent_app_date] => 2005-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 36 [patent_no_of_words] => 15559 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/733/07733704.pdf [firstpage_image] =>[orig_patent_app_number] => 11323569 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/323569
Non-volatile memory with power-saving multi-pass sensing Dec 28, 2005 Issued
Array ( [id] => 592133 [patent_doc_number] => 07450439 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-11 [patent_title] => 'Apparatus for generating internal voltage' [patent_app_type] => utility [patent_app_number] => 11/321115 [patent_app_country] => US [patent_app_date] => 2005-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 4179 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/450/07450439.pdf [firstpage_image] =>[orig_patent_app_number] => 11321115 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/321115
Apparatus for generating internal voltage Dec 27, 2005 Issued
Array ( [id] => 5158664 [patent_doc_number] => 20070171708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-26 [patent_title] => 'Multi-level memory cell sensing' [patent_app_type] => utility [patent_app_number] => 11/320529 [patent_app_country] => US [patent_app_date] => 2005-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5881 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20070171708.pdf [firstpage_image] =>[orig_patent_app_number] => 11320529 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/320529
Multi-level memory cell sensing Dec 27, 2005 Issued
Array ( [id] => 1077964 [patent_doc_number] => 07616481 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-10 [patent_title] => 'Memories with alternate sensing techniques' [patent_app_type] => utility [patent_app_number] => 11/320917 [patent_app_country] => US [patent_app_date] => 2005-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 13800 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 321 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/616/07616481.pdf [firstpage_image] =>[orig_patent_app_number] => 11320917 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/320917
Memories with alternate sensing techniques Dec 27, 2005 Issued
Array ( [id] => 592207 [patent_doc_number] => 07450453 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-11 [patent_title] => 'Semiconductor memory device and method for driving bit line sense amplifier thereof' [patent_app_type] => utility [patent_app_number] => 11/322041 [patent_app_country] => US [patent_app_date] => 2005-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3980 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/450/07450453.pdf [firstpage_image] =>[orig_patent_app_number] => 11322041 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/322041
Semiconductor memory device and method for driving bit line sense amplifier thereof Dec 27, 2005 Issued
Array ( [id] => 5886318 [patent_doc_number] => 20060274588 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-07 [patent_title] => 'Flash memory device and read method thereof' [patent_app_type] => utility [patent_app_number] => 11/320413 [patent_app_country] => US [patent_app_date] => 2005-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4373 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0274/20060274588.pdf [firstpage_image] =>[orig_patent_app_number] => 11320413 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/320413
Flash memory device and read method thereof Dec 27, 2005 Issued
Array ( [id] => 5676591 [patent_doc_number] => 20060181946 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-17 [patent_title] => 'Full-stress testable memory device having an open bit line architecture and method of testing the same' [patent_app_type] => utility [patent_app_number] => 11/319247 [patent_app_country] => US [patent_app_date] => 2005-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3089 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20060181946.pdf [firstpage_image] =>[orig_patent_app_number] => 11319247 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/319247
Full-stress testable memory device having an open bit line architecture and method of testing the same Dec 26, 2005 Issued
Array ( [id] => 874808 [patent_doc_number] => 07362610 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-04-22 [patent_title] => 'Programming method for non-volatile memory and non-volatile memory-based programmable logic device' [patent_app_type] => utility [patent_app_number] => 11/319751 [patent_app_country] => US [patent_app_date] => 2005-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6716 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/362/07362610.pdf [firstpage_image] =>[orig_patent_app_number] => 11319751 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/319751
Programming method for non-volatile memory and non-volatile memory-based programmable logic device Dec 26, 2005 Issued
Array ( [id] => 5158654 [patent_doc_number] => 20070171698 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-26 [patent_title] => 'Memory circuit including a resistive memory element and method for operating such a memory circuit' [patent_app_type] => utility [patent_app_number] => 11/318345 [patent_app_country] => US [patent_app_date] => 2005-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5262 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20070171698.pdf [firstpage_image] =>[orig_patent_app_number] => 11318345 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/318345
Memory circuit including a resistive memory element and method for operating such a memory circuit Dec 22, 2005 Issued
Array ( [id] => 5158653 [patent_doc_number] => 20070171697 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-26 [patent_title] => 'CBRAM memory device and method for writing to a resistive memory cell in a CBRAM memory device' [patent_app_type] => utility [patent_app_number] => 11/318331 [patent_app_country] => US [patent_app_date] => 2005-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3440 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20070171697.pdf [firstpage_image] =>[orig_patent_app_number] => 11318331 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/318331
Resistive memory device and method for writing to a resistive memory cell in a resistive memory device Dec 22, 2005 Issued
Array ( [id] => 5158650 [patent_doc_number] => 20070171694 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-26 [patent_title] => 'Current-switched spin-transfer magnetic devices with reduced spin-transfer switching current density' [patent_app_type] => utility [patent_app_number] => 11/318337 [patent_app_country] => US [patent_app_date] => 2005-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5557 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20070171694.pdf [firstpage_image] =>[orig_patent_app_number] => 11318337 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/318337
Current-switched spin-transfer magnetic devices with reduced spin-transfer switching current density Dec 22, 2005 Issued
Array ( [id] => 5871391 [patent_doc_number] => 20060164898 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-27 [patent_title] => 'Exploiting a statistical distribution of the values of an electrical characteristic in a population of auxiliary memory cells for obtaining reference cells' [patent_app_type] => utility [patent_app_number] => 11/318053 [patent_app_country] => US [patent_app_date] => 2005-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10118 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20060164898.pdf [firstpage_image] =>[orig_patent_app_number] => 11318053 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/318053
Exploiting a statistical distribution of the values of an electrical characteristic in a population of auxiliary memory cells for obtaining reference cells Dec 22, 2005 Issued
Array ( [id] => 5158675 [patent_doc_number] => 20070171719 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-26 [patent_title] => 'Method for programming non-volatile memory with reduced program disturb using modified pass voltages' [patent_app_type] => utility [patent_app_number] => 11/313023 [patent_app_country] => US [patent_app_date] => 2005-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11862 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20070171719.pdf [firstpage_image] =>[orig_patent_app_number] => 11313023 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/313023
Method for programming non-volatile memory with reduced program disturb using modified pass voltages Dec 18, 2005 Issued
Array ( [id] => 5158674 [patent_doc_number] => 20070171718 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-26 [patent_title] => 'Apparatus for programming non-volatile memory with reduced program disturb using modified pass voltages' [patent_app_type] => utility [patent_app_number] => 11/312925 [patent_app_country] => US [patent_app_date] => 2005-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11898 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20070171718.pdf [firstpage_image] =>[orig_patent_app_number] => 11312925 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/312925
Apparatus for programming non-volatile memory with reduced program disturb using modified pass voltages Dec 18, 2005 Issued
Array ( [id] => 5158661 [patent_doc_number] => 20070171705 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-26 [patent_title] => 'Writing phase change memories' [patent_app_type] => utility [patent_app_number] => 11/300819 [patent_app_country] => US [patent_app_date] => 2005-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6097 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20070171705.pdf [firstpage_image] =>[orig_patent_app_number] => 11300819 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/300819
Writing phase change memories Dec 14, 2005 Abandoned
Array ( [id] => 5158687 [patent_doc_number] => 20070171731 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-26 [patent_title] => 'Leakage mitigation logic' [patent_app_type] => utility [patent_app_number] => 11/300599 [patent_app_country] => US [patent_app_date] => 2005-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6742 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20070171731.pdf [firstpage_image] =>[orig_patent_app_number] => 11300599 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/300599
Leakage mitigation logic Dec 14, 2005 Issued
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