
Arezoo Sherkat
Examiner (ID: 12013)
| Most Active Art Unit | 2434 |
| Art Unit(s) | 2494, IPBS, 2431, 2131, 2434 |
| Total Applications | 370 |
| Issued Applications | 274 |
| Pending Applications | 15 |
| Abandoned Applications | 81 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 240525
[patent_doc_number] => 07593247
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-09-22
[patent_title] => 'Electronic memory device having high integration density non-volatile memory cells and a reduced capacitive coupling'
[patent_app_type] => utility
[patent_app_number] => 11/300145
[patent_app_country] => US
[patent_app_date] => 2005-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 3257
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/593/07593247.pdf
[firstpage_image] =>[orig_patent_app_number] => 11300145
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/300145 | Electronic memory device having high integration density non-volatile memory cells and a reduced capacitive coupling | Dec 13, 2005 | Issued |
Array
(
[id] => 5158712
[patent_doc_number] => 20070171756
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-26
[patent_title] => 'Double byte select high voltage line for EEPROM memory block'
[patent_app_type] => utility
[patent_app_number] => 11/301401
[patent_app_country] => US
[patent_app_date] => 2005-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2730
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0171/20070171756.pdf
[firstpage_image] =>[orig_patent_app_number] => 11301401
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/301401 | Double byte select high voltage line for EEPROM memory block | Dec 12, 2005 | Issued |
Array
(
[id] => 906098
[patent_doc_number] => 07336551
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-02-26
[patent_title] => 'Semiconductor memory devices and systems, and methods of using having reduced timers and registers'
[patent_app_type] => utility
[patent_app_number] => 11/291285
[patent_app_country] => US
[patent_app_date] => 2005-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2246
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/336/07336551.pdf
[firstpage_image] =>[orig_patent_app_number] => 11291285
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/291285 | Semiconductor memory devices and systems, and methods of using having reduced timers and registers | Nov 29, 2005 | Issued |
Array
(
[id] => 441296
[patent_doc_number] => 07259981
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2007-08-21
[patent_title] => 'Nonvolatile analog memory'
[patent_app_type] => utility
[patent_app_number] => 11/296719
[patent_app_country] => US
[patent_app_date] => 2005-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 2089
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/259/07259981.pdf
[firstpage_image] =>[orig_patent_app_number] => 11296719
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/296719 | Nonvolatile analog memory | Nov 28, 2005 | Issued |
Array
(
[id] => 4548505
[patent_doc_number] => 07876596
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-01-25
[patent_title] => 'Memory element and method for manufacturing same'
[patent_app_type] => utility
[patent_app_number] => 11/575091
[patent_app_country] => US
[patent_app_date] => 2005-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 17
[patent_no_of_words] => 12544
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 37
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/876/07876596.pdf
[firstpage_image] =>[orig_patent_app_number] => 11575091
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/575091 | Memory element and method for manufacturing same | Nov 3, 2005 | Issued |
Array
(
[id] => 5618195
[patent_doc_number] => 20060187728
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-08-24
[patent_title] => 'Integrated semiconductor memory'
[patent_app_type] => utility
[patent_app_number] => 11/238625
[patent_app_country] => US
[patent_app_date] => 2005-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5920
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0187/20060187728.pdf
[firstpage_image] =>[orig_patent_app_number] => 11238625
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/238625 | Integrated semiconductor memory | Sep 28, 2005 | Abandoned |
Array
(
[id] => 5714371
[patent_doc_number] => 20060077734
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-04-13
[patent_title] => 'Direct mapped repair cache systems and methods'
[patent_app_type] => utility
[patent_app_number] => 11/230405
[patent_app_country] => US
[patent_app_date] => 2005-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7045
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0077/20060077734.pdf
[firstpage_image] =>[orig_patent_app_number] => 11230405
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/230405 | Direct mapped repair cache systems and methods | Sep 19, 2005 | Abandoned |
Array
(
[id] => 5900524
[patent_doc_number] => 20060044873
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-02
[patent_title] => 'Semiconductor device and a method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/186877
[patent_app_country] => US
[patent_app_date] => 2005-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 35
[patent_figures_cnt] => 35
[patent_no_of_words] => 11577
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0044/20060044873.pdf
[firstpage_image] =>[orig_patent_app_number] => 11186877
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/186877 | Semiconductor device and a method of manufacturing the same | Jul 21, 2005 | Abandoned |
Array
(
[id] => 192046
[patent_doc_number] => 07643365
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-01-05
[patent_title] => 'Semiconductor integrated circuit and method of testing same'
[patent_app_type] => utility
[patent_app_number] => 11/117299
[patent_app_country] => US
[patent_app_date] => 2005-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4530
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/643/07643365.pdf
[firstpage_image] =>[orig_patent_app_number] => 11117299
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/117299 | Semiconductor integrated circuit and method of testing same | Apr 28, 2005 | Issued |
Array
(
[id] => 7594583
[patent_doc_number] => 07626880
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-12-01
[patent_title] => 'Memory device having a read pipeline and a delay locked loop'
[patent_app_type] => utility
[patent_app_number] => 11/107504
[patent_app_country] => US
[patent_app_date] => 2005-04-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 3948
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 179
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/626/07626880.pdf
[firstpage_image] =>[orig_patent_app_number] => 11107504
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/107504 | Memory device having a read pipeline and a delay locked loop | Apr 14, 2005 | Issued |
Array
(
[id] => 7049560
[patent_doc_number] => 20050185447
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-08-25
[patent_title] => 'Open circuit potential amperometry and voltammetry'
[patent_app_type] => utility
[patent_app_number] => 11/102089
[patent_app_country] => US
[patent_app_date] => 2005-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 12886
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0185/20050185447.pdf
[firstpage_image] =>[orig_patent_app_number] => 11102089
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/102089 | Open circuit potential amperometry and voltammetry | Apr 6, 2005 | Issued |
Array
(
[id] => 7592302
[patent_doc_number] => 07652903
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-01-26
[patent_title] => 'Hit ahead hierarchical scalable priority encoding logic and circuits'
[patent_app_type] => utility
[patent_app_number] => 11/073116
[patent_app_country] => US
[patent_app_date] => 2005-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3845
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 294
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/652/07652903.pdf
[firstpage_image] =>[orig_patent_app_number] => 11073116
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/073116 | Hit ahead hierarchical scalable priority encoding logic and circuits | Mar 3, 2005 | Issued |
Array
(
[id] => 5595009
[patent_doc_number] => 20060158925
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-20
[patent_title] => 'Non-volatile static memory cell'
[patent_app_type] => utility
[patent_app_number] => 10/560677
[patent_app_country] => US
[patent_app_date] => 2004-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2861
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 8
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0158/20060158925.pdf
[firstpage_image] =>[orig_patent_app_number] => 10560677
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/560677 | Non-volatile static memory cell | Jun 9, 2004 | Issued |