Ario Etienne

Array ( [id] => 4256975 [patent_doc_number] => 06145017 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-07 [patent_title] => 'Data alignment system for a hardware accelerated command interpreter engine' [patent_app_type] => 1 [patent_app_number] => 9/130322 [patent_app_country] => US [patent_app_date] => 1998-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 13197 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/145/06145017.pdf [firstpage_image] =>[orig_patent_app_number] => 130322 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4203777 [patent_doc_number] => 06151645 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-21 [patent_title] => 'Computer communicates with two incompatible wireless peripherals using fewer transceivers' [patent_app_type] => 1 [patent_app_number] => 9/131252 [patent_app_country] => US [patent_app_date] => 1998-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2690 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/151/06151645.pdf [firstpage_image] =>[orig_patent_app_number] => 131252 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4423540 [patent_doc_number] => 06240470 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-29 [patent_title] => 'Magnetic disk control unit, and firmware active-interchange method therefor' [patent_app_type] => 1 [patent_app_number] => 9/138425 [patent_app_country] => US [patent_app_date] => 1998-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 7586 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/240/06240470.pdf [firstpage_image] =>[orig_patent_app_number] => 138425 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4177379 [patent_doc_number] => 06108731 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Information processor and method of its component arrangement' [patent_app_type] => 1 [patent_app_number] => 9/117741 [patent_app_country] => US [patent_app_date] => 1998-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11850 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/108/06108731.pdf [firstpage_image] =>[orig_patent_app_number] => 117741 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4424322 [patent_doc_number] => 06266710 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-24 [patent_title] => 'Serial data transfer device' [patent_app_type] => 1 [patent_app_number] => 9/128871 [patent_app_country] => US [patent_app_date] => 1998-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5285 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/266/06266710.pdf [firstpage_image] =>[orig_patent_app_number] => 128871 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4254899 [patent_doc_number] => 06119195 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-12 [patent_title] => 'Virtualizing serial bus information point by address mapping via a parallel port' [patent_app_type] => 1 [patent_app_number] => 9/128959 [patent_app_country] => US [patent_app_date] => 1998-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8555 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/119/06119195.pdf [firstpage_image] =>[orig_patent_app_number] => 128959 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1524838 [patent_doc_number] => 06415345 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-02 [patent_title] => 'Bus mastering interface control system for transferring multistream data over a host bus' [patent_app_type] => B1 [patent_app_number] => 09/128583 [patent_app_country] => US [patent_app_date] => 1998-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 6141 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/415/06415345.pdf [firstpage_image] =>[orig_patent_app_number] => 09128583 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4423614 [patent_doc_number] => 06240479 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-29 [patent_title] => 'Method and apparatus for transferring data on a split bus in a data processing system' [patent_app_type] => 1 [patent_app_number] => 9/127459 [patent_app_country] => US [patent_app_date] => 1998-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 6308 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/240/06240479.pdf [firstpage_image] =>[orig_patent_app_number] => 127459 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4426712 [patent_doc_number] => 06178514 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-23 [patent_title] => 'Method and apparatus for connecting a device to a bus carrying power and a signal' [patent_app_type] => 1 [patent_app_number] => 9/127642 [patent_app_country] => US [patent_app_date] => 1998-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 30 [patent_no_of_words] => 19573 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/178/06178514.pdf [firstpage_image] =>[orig_patent_app_number] => 127642 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4203418 [patent_doc_number] => 06161153 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-12 [patent_title] => 'Method for sharing data buffers from a buffer pool' [patent_app_type] => 1 [patent_app_number] => 9/126942 [patent_app_country] => US [patent_app_date] => 1998-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7201 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/161/06161153.pdf [firstpage_image] =>[orig_patent_app_number] => 126942 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1462386 [patent_doc_number] => 06427183 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-30 [patent_title] => 'Circuit for the demand-conforming switching on and off of a load' [patent_app_type] => B1 [patent_app_number] => 09/124498 [patent_app_country] => US [patent_app_date] => 1998-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3788 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/427/06427183.pdf [firstpage_image] =>[orig_patent_app_number] => 09124498 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4254175 [patent_doc_number] => 06119148 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-12 [patent_title] => 'Computer video signal distributor between a computer and a plurality of monitors' [patent_app_type] => 1 [patent_app_number] => 9/124226 [patent_app_country] => US [patent_app_date] => 1998-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1654 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 319 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/119/06119148.pdf [firstpage_image] =>[orig_patent_app_number] => 124226 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4123806 [patent_doc_number] => 06101570 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Method and apparatus for fair bus arbitration in multiple initiator SCSI systems' [patent_app_type] => 1 [patent_app_number] => 9/123712 [patent_app_country] => US [patent_app_date] => 1998-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3429 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/101/06101570.pdf [firstpage_image] =>[orig_patent_app_number] => 123712 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4206536 [patent_doc_number] => 06131134 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-10 [patent_title] => 'Hot plug-and-play converter of a universal serial bus interface' [patent_app_type] => 1 [patent_app_number] => 9/123569 [patent_app_country] => US [patent_app_date] => 1998-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4853 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/131/06131134.pdf [firstpage_image] =>[orig_patent_app_number] => 123569 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4255539 [patent_doc_number] => 06119237 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-12 [patent_title] => 'Method and apparatus for regulating power supplied from a docking station to a portable computer' [patent_app_type] => 1 [patent_app_number] => 9/116600 [patent_app_country] => US [patent_app_date] => 1998-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5556 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/119/06119237.pdf [firstpage_image] =>[orig_patent_app_number] => 116600 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4304607 [patent_doc_number] => 06269418 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-31 [patent_title] => 'Priority-based shared bus request signal mediating circuit' [patent_app_type] => 1 [patent_app_number] => 9/115300 [patent_app_country] => US [patent_app_date] => 1998-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4565 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/269/06269418.pdf [firstpage_image] =>[orig_patent_app_number] => 115300 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4037891 [patent_doc_number] => 05926641 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-20 [patent_title] => 'Clock frequency change circuit' [patent_app_type] => 1 [patent_app_number] => 9/113642 [patent_app_country] => US [patent_app_date] => 1998-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 7330 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/926/05926641.pdf [firstpage_image] =>[orig_patent_app_number] => 113642 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4421939 [patent_doc_number] => 06233635 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-15 [patent_title] => 'Diagnostic/control system using a multi-level I2C bus' [patent_app_type] => 1 [patent_app_number] => 9/114306 [patent_app_country] => US [patent_app_date] => 1998-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4402 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/233/06233635.pdf [firstpage_image] =>[orig_patent_app_number] => 114306 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4176893 [patent_doc_number] => 06105088 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-15 [patent_title] => 'Backplane assembly for electronic circuit modules providing electronic reconfigurable connectivity of digital signals and manual reconfigurable connectivity power, optical and RF signals' [patent_app_type] => 1 [patent_app_number] => 9/112428 [patent_app_country] => US [patent_app_date] => 1998-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3239 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/105/06105088.pdf [firstpage_image] =>[orig_patent_app_number] => 112428 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1572242 [patent_doc_number] => 06378017 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-23 [patent_title] => 'Processor interconnection' [patent_app_type] => B1 [patent_app_number] => 09/112253 [patent_app_country] => US [patent_app_date] => 1998-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 5730 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/378/06378017.pdf [firstpage_image] =>[orig_patent_app_number] => 09112253 [rel_patent_id] =>[rel_patent_doc_number] =>)