Search

Ario Etienne

Supervisory Patent Examiner (ID: 13470, Phone: (571)272-4001 , Office: P/2457 )

Most Active Art Unit
2781
Art Unit(s)
2457, 2781, 2155, 2157, 2312, 2305, 2787
Total Applications
502
Issued Applications
404
Pending Applications
51
Abandoned Applications
47

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4277350 [patent_doc_number] => 06179486 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-30 [patent_title] => 'Method for hot add of a mass storage adapter on a system including a dynamically loaded adapter driver' [patent_app_type] => 1 [patent_app_number] => 8/962963 [patent_app_country] => US [patent_app_date] => 1997-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 11290 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/179/06179486.pdf [firstpage_image] =>[orig_patent_app_number] => 962963 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/962963
Method for hot add of a mass storage adapter on a system including a dynamically loaded adapter driver Sep 30, 1997 Issued
Array ( [id] => 4376132 [patent_doc_number] => 06219734 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-17 [patent_title] => 'Method for the hot add of a mass storage adapter on a system including a statically loaded adapter driver' [patent_app_type] => 1 [patent_app_number] => 8/942069 [patent_app_country] => US [patent_app_date] => 1997-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 11164 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/219/06219734.pdf [firstpage_image] =>[orig_patent_app_number] => 942069 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/942069
Method for the hot add of a mass storage adapter on a system including a statically loaded adapter driver Sep 30, 1997 Issued
Array ( [id] => 4317661 [patent_doc_number] => 06182180 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-30 [patent_title] => 'Apparatus for interfacing buses' [patent_app_type] => 1 [patent_app_number] => 8/942382 [patent_app_country] => US [patent_app_date] => 1997-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 12 [patent_no_of_words] => 9564 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/182/06182180.pdf [firstpage_image] =>[orig_patent_app_number] => 942382 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/942382
Apparatus for interfacing buses Sep 30, 1997 Issued
Array ( [id] => 4021716 [patent_doc_number] => 05987554 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-16 [patent_title] => 'Method of controlling the transfer of information across an interface between two buses' [patent_app_type] => 1 [patent_app_number] => 8/942413 [patent_app_country] => US [patent_app_date] => 1997-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 12 [patent_no_of_words] => 9687 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/987/05987554.pdf [firstpage_image] =>[orig_patent_app_number] => 942413 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/942413
Method of controlling the transfer of information across an interface between two buses Sep 30, 1997 Issued
Array ( [id] => 3973926 [patent_doc_number] => 05978921 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'Computer system and control method thereof' [patent_app_type] => 1 [patent_app_number] => 8/941613 [patent_app_country] => US [patent_app_date] => 1997-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 3631 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/978/05978921.pdf [firstpage_image] =>[orig_patent_app_number] => 941613 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/941613
Computer system and control method thereof Sep 29, 1997 Issued
Array ( [id] => 3895073 [patent_doc_number] => 05765002 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-09 [patent_title] => 'Method and apparatus for minimizing power consumption in a microprocessor controlled storage device' [patent_app_type] => 1 [patent_app_number] => 8/938398 [patent_app_country] => US [patent_app_date] => 1997-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3718 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/765/05765002.pdf [firstpage_image] =>[orig_patent_app_number] => 938398 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/938398
Method and apparatus for minimizing power consumption in a microprocessor controlled storage device Sep 25, 1997 Issued
Array ( [id] => 3945004 [patent_doc_number] => 05935227 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'Computer system including a riser card with multiple inter-component cabling elimination features' [patent_app_type] => 1 [patent_app_number] => 8/935475 [patent_app_country] => US [patent_app_date] => 1997-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1976 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/935/05935227.pdf [firstpage_image] =>[orig_patent_app_number] => 935475 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/935475
Computer system including a riser card with multiple inter-component cabling elimination features Sep 23, 1997 Issued
Array ( [id] => 3969997 [patent_doc_number] => 05958034 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-28 [patent_title] => 'Inductive impedance modulation of transmission lines with stub loads' [patent_app_type] => 1 [patent_app_number] => 8/935038 [patent_app_country] => US [patent_app_date] => 1997-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2569 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/958/05958034.pdf [firstpage_image] =>[orig_patent_app_number] => 935038 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/935038
Inductive impedance modulation of transmission lines with stub loads Sep 21, 1997 Issued
Array ( [id] => 4240075 [patent_doc_number] => 06012124 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-04 [patent_title] => 'Disk system with activation control of disk drive motors' [patent_app_type] => 1 [patent_app_number] => 8/934201 [patent_app_country] => US [patent_app_date] => 1997-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 24 [patent_no_of_words] => 10707 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/012/06012124.pdf [firstpage_image] =>[orig_patent_app_number] => 934201 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/934201
Disk system with activation control of disk drive motors Sep 18, 1997 Issued
Array ( [id] => 4148614 [patent_doc_number] => 06016526 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-18 [patent_title] => 'Method and apparatus for transferring data between buses having differing ordering policies via the use of autonomous units' [patent_app_type] => 1 [patent_app_number] => 8/934415 [patent_app_country] => US [patent_app_date] => 1997-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 16605 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/016/06016526.pdf [firstpage_image] =>[orig_patent_app_number] => 934415 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/934415
Method and apparatus for transferring data between buses having differing ordering policies via the use of autonomous units Sep 18, 1997 Issued
Array ( [id] => 3900742 [patent_doc_number] => 05806070 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-08 [patent_title] => 'Device and method for controlling solid-state memory system' [patent_app_type] => 1 [patent_app_number] => 8/931193 [patent_app_country] => US [patent_app_date] => 1997-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 9278 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/806/05806070.pdf [firstpage_image] =>[orig_patent_app_number] => 931193 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/931193
Device and method for controlling solid-state memory system Sep 15, 1997 Issued
Array ( [id] => 3970346 [patent_doc_number] => 05991842 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-23 [patent_title] => 'Communication system for providing digital data transfer, electronic equipment for transferring data using the communication system, and an interface control device' [patent_app_type] => 1 [patent_app_number] => 8/917295 [patent_app_country] => US [patent_app_date] => 1997-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 6288 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/991/05991842.pdf [firstpage_image] =>[orig_patent_app_number] => 917295 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/917295
Communication system for providing digital data transfer, electronic equipment for transferring data using the communication system, and an interface control device Aug 24, 1997 Issued
Array ( [id] => 4076156 [patent_doc_number] => 05896514 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-20 [patent_title] => 'Logic implementation of control signals for on-silicon multi-master data transfer bus' [patent_app_type] => 1 [patent_app_number] => 8/918596 [patent_app_country] => US [patent_app_date] => 1997-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3014 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/896/05896514.pdf [firstpage_image] =>[orig_patent_app_number] => 918596 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/918596
Logic implementation of control signals for on-silicon multi-master data transfer bus Aug 22, 1997 Issued
Array ( [id] => 4068012 [patent_doc_number] => 05933615 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-03 [patent_title] => 'Optimization of the transfer of data word sequences' [patent_app_type] => 1 [patent_app_number] => 8/875956 [patent_app_country] => US [patent_app_date] => 1997-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2740 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/933/05933615.pdf [firstpage_image] =>[orig_patent_app_number] => 875956 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/875956
Optimization of the transfer of data word sequences Aug 7, 1997 Issued
Array ( [id] => 4015025 [patent_doc_number] => 05925112 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-20 [patent_title] => 'Information transfer apparatus and information recording apparatus including transfer control means for determining a transfer sequence of plural information blocks' [patent_app_type] => 1 [patent_app_number] => 8/907548 [patent_app_country] => US [patent_app_date] => 1997-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 8478 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/925/05925112.pdf [firstpage_image] =>[orig_patent_app_number] => 907548 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/907548
Information transfer apparatus and information recording apparatus including transfer control means for determining a transfer sequence of plural information blocks Aug 7, 1997 Issued
Array ( [id] => 4426570 [patent_doc_number] => 06178465 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-23 [patent_title] => 'Image processors for reading and outputting data' [patent_app_type] => 1 [patent_app_number] => 8/894607 [patent_app_country] => US [patent_app_date] => 1997-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 4019 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/178/06178465.pdf [firstpage_image] =>[orig_patent_app_number] => 894607 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/894607
Image processors for reading and outputting data Aug 5, 1997 Issued
Array ( [id] => 4029665 [patent_doc_number] => 05963722 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-05 [patent_title] => 'Byte granularity data checking in a bus bridge verification system' [patent_app_type] => 1 [patent_app_number] => 8/904190 [patent_app_country] => US [patent_app_date] => 1997-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 9380 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/963/05963722.pdf [firstpage_image] =>[orig_patent_app_number] => 904190 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/904190
Byte granularity data checking in a bus bridge verification system Jul 30, 1997 Issued
Array ( [id] => 4126627 [patent_doc_number] => 06058449 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-02 [patent_title] => 'Fault tolerant serial arbitration system' [patent_app_type] => 1 [patent_app_number] => 8/904029 [patent_app_country] => US [patent_app_date] => 1997-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 5087 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/058/06058449.pdf [firstpage_image] =>[orig_patent_app_number] => 904029 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/904029
Fault tolerant serial arbitration system Jul 30, 1997 Issued
Array ( [id] => 4056896 [patent_doc_number] => 05909558 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-01 [patent_title] => 'Low power serial arbitration system' [patent_app_type] => 1 [patent_app_number] => 8/904156 [patent_app_country] => US [patent_app_date] => 1997-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 5092 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/909/05909558.pdf [firstpage_image] =>[orig_patent_app_number] => 904156 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/904156
Low power serial arbitration system Jul 30, 1997 Issued
Array ( [id] => 3997140 [patent_doc_number] => 05961625 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-05 [patent_title] => 'Bus bridge state monitoring in a bus bridge verification system' [patent_app_type] => 1 [patent_app_number] => 8/904192 [patent_app_country] => US [patent_app_date] => 1997-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 9380 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/961/05961625.pdf [firstpage_image] =>[orig_patent_app_number] => 904192 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/904192
Bus bridge state monitoring in a bus bridge verification system Jul 30, 1997 Issued
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