Search

Ario Etienne

Supervisory Patent Examiner (ID: 13470, Phone: (571)272-4001 , Office: P/2457 )

Most Active Art Unit
2781
Art Unit(s)
2457, 2781, 2155, 2157, 2312, 2305, 2787
Total Applications
502
Issued Applications
404
Pending Applications
51
Abandoned Applications
47

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3708944 [patent_doc_number] => 05678020 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-14 [patent_title] => 'Memory subsystem wherein a single processor chip controls multiple cache memory chips' [patent_app_type] => 1 [patent_app_number] => 8/757959 [patent_app_country] => US [patent_app_date] => 1996-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 8702 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/678/05678020.pdf [firstpage_image] =>[orig_patent_app_number] => 757959 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/757959
Memory subsystem wherein a single processor chip controls multiple cache memory chips Nov 24, 1996 Issued
Array ( [id] => 3961278 [patent_doc_number] => 05974490 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-26 [patent_title] => 'Plural disk unit apparatus providing high-density mounting of disk units and peripheral units' [patent_app_type] => 1 [patent_app_number] => 8/754126 [patent_app_country] => US [patent_app_date] => 1996-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 5081 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/974/05974490.pdf [firstpage_image] =>[orig_patent_app_number] => 754126 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/754126
Plural disk unit apparatus providing high-density mounting of disk units and peripheral units Nov 21, 1996 Issued
Array ( [id] => 4024076 [patent_doc_number] => 05890017 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-30 [patent_title] => 'Application-independent audio stream mixer' [patent_app_type] => 1 [patent_app_number] => 8/753084 [patent_app_country] => US [patent_app_date] => 1996-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2980 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/890/05890017.pdf [firstpage_image] =>[orig_patent_app_number] => 753084 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/753084
Application-independent audio stream mixer Nov 19, 1996 Issued
Array ( [id] => 3898270 [patent_doc_number] => 05894563 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-13 [patent_title] => 'Method and apparatus for providing a PCI bridge between multiple PCI environments' [patent_app_type] => 1 [patent_app_number] => 8/752888 [patent_app_country] => US [patent_app_date] => 1996-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3860 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/894/05894563.pdf [firstpage_image] =>[orig_patent_app_number] => 752888 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/752888
Method and apparatus for providing a PCI bridge between multiple PCI environments Nov 19, 1996 Issued
Array ( [id] => 4057323 [patent_doc_number] => 05909586 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-01 [patent_title] => 'Methods and systems for interfacing with an interface powered I/O device' [patent_app_type] => 1 [patent_app_number] => 8/744785 [patent_app_country] => US [patent_app_date] => 1996-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4424 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/909/05909586.pdf [firstpage_image] =>[orig_patent_app_number] => 744785 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/744785
Methods and systems for interfacing with an interface powered I/O device Nov 5, 1996 Issued
Array ( [id] => 3918471 [patent_doc_number] => 05751989 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-12 [patent_title] => 'System for decentralizing backing store control of virtual memory in a computer' [patent_app_type] => 1 [patent_app_number] => 8/743344 [patent_app_country] => US [patent_app_date] => 1996-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4472 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/751/05751989.pdf [firstpage_image] =>[orig_patent_app_number] => 743344 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/743344
System for decentralizing backing store control of virtual memory in a computer Nov 3, 1996 Issued
Array ( [id] => 3918602 [patent_doc_number] => 05898845 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-27 [patent_title] => 'Assigning and utilizing overlapping address space for multiple cards on a common computer bus' [patent_app_type] => 1 [patent_app_number] => 8/739685 [patent_app_country] => US [patent_app_date] => 1996-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2767 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/898/05898845.pdf [firstpage_image] =>[orig_patent_app_number] => 739685 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/739685
Assigning and utilizing overlapping address space for multiple cards on a common computer bus Oct 28, 1996 Issued
Array ( [id] => 3898257 [patent_doc_number] => 05894562 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-13 [patent_title] => 'Method and apparatus for controlling bus arbitration in a data processing system' [patent_app_type] => 1 [patent_app_number] => 8/738515 [patent_app_country] => US [patent_app_date] => 1996-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3444 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/894/05894562.pdf [firstpage_image] =>[orig_patent_app_number] => 738515 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/738515
Method and apparatus for controlling bus arbitration in a data processing system Oct 27, 1996 Issued
Array ( [id] => 3966930 [patent_doc_number] => 05983299 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-09 [patent_title] => 'Priority request and bypass bus' [patent_app_type] => 1 [patent_app_number] => 8/730915 [patent_app_country] => US [patent_app_date] => 1996-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4256 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/983/05983299.pdf [firstpage_image] =>[orig_patent_app_number] => 730915 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/730915
Priority request and bypass bus Oct 17, 1996 Issued
Array ( [id] => 4065383 [patent_doc_number] => 05870616 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-09 [patent_title] => 'System and method for reducing power consumption in an electronic circuit' [patent_app_type] => 1 [patent_app_number] => 8/726871 [patent_app_country] => US [patent_app_date] => 1996-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 11504 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/870/05870616.pdf [firstpage_image] =>[orig_patent_app_number] => 726871 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/726871
System and method for reducing power consumption in an electronic circuit Oct 3, 1996 Issued
Array ( [id] => 3898274 [patent_doc_number] => 05805907 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-08 [patent_title] => 'System and method for reducing power consumption in an electronic circuit' [patent_app_type] => 1 [patent_app_number] => 8/726370 [patent_app_country] => US [patent_app_date] => 1996-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 11518 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/805/05805907.pdf [firstpage_image] =>[orig_patent_app_number] => 726370 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/726370
System and method for reducing power consumption in an electronic circuit Oct 3, 1996 Issued
Array ( [id] => 4018314 [patent_doc_number] => 05860016 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-12 [patent_title] => 'Arrangement, system, and method for automatic remapping of frame buffers when switching operating modes' [patent_app_type] => 1 [patent_app_number] => 8/720392 [patent_app_country] => US [patent_app_date] => 1996-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3691 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/860/05860016.pdf [firstpage_image] =>[orig_patent_app_number] => 720392 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/720392
Arrangement, system, and method for automatic remapping of frame buffers when switching operating modes Sep 29, 1996 Issued
Array ( [id] => 3995843 [patent_doc_number] => 05911051 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-08 [patent_title] => 'High-throughput interconnect allowing bus transactions based on partial access requests' [patent_app_type] => 1 [patent_app_number] => 8/721686 [patent_app_country] => US [patent_app_date] => 1996-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 51 [patent_no_of_words] => 24848 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/911/05911051.pdf [firstpage_image] =>[orig_patent_app_number] => 721686 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/721686
High-throughput interconnect allowing bus transactions based on partial access requests Sep 26, 1996 Issued
Array ( [id] => 4030346 [patent_doc_number] => 05907713 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-25 [patent_title] => 'Control method for a hard disk drive and a data processor reducing power consumption of the hard disk drive' [patent_app_type] => 1 [patent_app_number] => 8/721062 [patent_app_country] => US [patent_app_date] => 1996-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 7361 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/907/05907713.pdf [firstpage_image] =>[orig_patent_app_number] => 721062 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/721062
Control method for a hard disk drive and a data processor reducing power consumption of the hard disk drive Sep 25, 1996 Issued
Array ( [id] => 3795192 [patent_doc_number] => 05809334 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-15 [patent_title] => 'Receive packet pre-parsing by a DMA controller' [patent_app_type] => 1 [patent_app_number] => 8/710891 [patent_app_country] => US [patent_app_date] => 1996-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3796 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/809/05809334.pdf [firstpage_image] =>[orig_patent_app_number] => 710891 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/710891
Receive packet pre-parsing by a DMA controller Sep 23, 1996 Issued
Array ( [id] => 3842299 [patent_doc_number] => 05784629 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-21 [patent_title] => 'System and method for conserving power within a backup battery device' [patent_app_type] => 1 [patent_app_number] => 8/719264 [patent_app_country] => US [patent_app_date] => 1996-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3765 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/784/05784629.pdf [firstpage_image] =>[orig_patent_app_number] => 719264 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/719264
System and method for conserving power within a backup battery device Sep 23, 1996 Issued
Array ( [id] => 4152329 [patent_doc_number] => 06148360 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-14 [patent_title] => 'Nonvolatile writeable memory with program suspend command' [patent_app_type] => 1 [patent_app_number] => 8/718216 [patent_app_country] => US [patent_app_date] => 1996-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 4920 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/148/06148360.pdf [firstpage_image] =>[orig_patent_app_number] => 718216 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/718216
Nonvolatile writeable memory with program suspend command Sep 19, 1996 Issued
Array ( [id] => 3970295 [patent_doc_number] => 05991839 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-23 [patent_title] => 'Computer system having computer main body and expansion unit' [patent_app_type] => 1 [patent_app_number] => 8/716860 [patent_app_country] => US [patent_app_date] => 1996-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 10122 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/991/05991839.pdf [firstpage_image] =>[orig_patent_app_number] => 716860 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/716860
Computer system having computer main body and expansion unit Sep 19, 1996 Issued
Array ( [id] => 4067939 [patent_doc_number] => 05933610 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-03 [patent_title] => 'Predictive arbitration system for PCI bus agents' [patent_app_type] => 1 [patent_app_number] => 8/718086 [patent_app_country] => US [patent_app_date] => 1996-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5317 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/933/05933610.pdf [firstpage_image] =>[orig_patent_app_number] => 718086 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/718086
Predictive arbitration system for PCI bus agents Sep 16, 1996 Issued
Array ( [id] => 4178910 [patent_doc_number] => 06115775 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-05 [patent_title] => 'Method and apparatus for performing interrupt frequency mitigation in a network node' [patent_app_type] => 1 [patent_app_number] => 8/712688 [patent_app_country] => US [patent_app_date] => 1996-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 72 [patent_figures_cnt] => 80 [patent_no_of_words] => 50166 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 311 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/115/06115775.pdf [firstpage_image] =>[orig_patent_app_number] => 712688 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/712688
Method and apparatus for performing interrupt frequency mitigation in a network node Sep 11, 1996 Issued
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