Search

Arman Milanian

Examiner (ID: 18996, Phone: (571)272-9846 , Office: P/3723 )

Most Active Art Unit
3723
Art Unit(s)
3723
Total Applications
392
Issued Applications
225
Pending Applications
0
Abandoned Applications
167

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16942986 [patent_doc_number] => 11055228 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-06 [patent_title] => Caching bypass mechanism for a multi-level memory [patent_app_type] => utility [patent_app_number] => 16/264615 [patent_app_country] => US [patent_app_date] => 2019-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6729 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16264615 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/264615
Caching bypass mechanism for a multi-level memory Jan 30, 2019 Issued
Array ( [id] => 15442215 [patent_doc_number] => 20200035291 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-30 [patent_title] => METHOD OF PERFORMING INTERNAL PROCESSING OPERATION OF MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/251983 [patent_app_country] => US [patent_app_date] => 2019-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9623 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16251983 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/251983
Method of performing internal processing operation of memory device Jan 17, 2019 Issued
Array ( [id] => 15367463 [patent_doc_number] => 20200019496 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-16 [patent_title] => MEMORY SYSTEM AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/237121 [patent_app_country] => US [patent_app_date] => 2018-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12140 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16237121 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/237121
Memory system and operating method thereof Dec 30, 2018 Issued
Array ( [id] => 14506625 [patent_doc_number] => 20190196967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-27 [patent_title] => DEVICE INCLUDING ACCESS CONTROLLER, SYSTEM ON CHIP AND SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 16/233313 [patent_app_country] => US [patent_app_date] => 2018-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6808 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16233313 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/233313
DEVICE INCLUDING ACCESS CONTROLLER, SYSTEM ON CHIP AND SYSTEM INCLUDING THE SAME Dec 26, 2018 Abandoned
Array ( [id] => 16095163 [patent_doc_number] => 20200201568 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-25 [patent_title] => EXCEPTION HANDLING BASED ON RESPONSES TO MEMORY REQUESTS IN A MEMORY SUBSYSTEM [patent_app_type] => utility [patent_app_number] => 16/228460 [patent_app_country] => US [patent_app_date] => 2018-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7640 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16228460 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/228460
EXCEPTION HANDLING BASED ON RESPONSES TO MEMORY REQUESTS IN A MEMORY SUBSYSTEM Dec 19, 2018 Abandoned
Array ( [id] => 14076749 [patent_doc_number] => 20190087262 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-21 [patent_title] => DISPERSED B-TREE DIRECTORY TREES [patent_app_type] => utility [patent_app_number] => 16/193328 [patent_app_country] => US [patent_app_date] => 2018-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11037 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16193328 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/193328
Dispersed b-tree directory trees Nov 15, 2018 Issued
Array ( [id] => 13992441 [patent_doc_number] => 20190065378 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => DEFERRED RESPONSE TO A PREFETCH REQUEST [patent_app_type] => utility [patent_app_number] => 16/174338 [patent_app_country] => US [patent_app_date] => 2018-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 27889 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16174338 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/174338
Deferred response to a prefetch request Oct 29, 2018 Issued
Array ( [id] => 14669419 [patent_doc_number] => 10372611 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-06 [patent_title] => Deferred response to a prefetch request [patent_app_type] => utility [patent_app_number] => 16/174368 [patent_app_country] => US [patent_app_date] => 2018-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 27789 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16174368 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/174368
Deferred response to a prefetch request Oct 29, 2018 Issued
Array ( [id] => 15577783 [patent_doc_number] => 10579270 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-03 [patent_title] => Reducing write amplification in solid-state drives by separating allocation of relocate writes from user writes [patent_app_type] => utility [patent_app_number] => 16/174068 [patent_app_country] => US [patent_app_date] => 2018-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 10349 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16174068 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/174068
Reducing write amplification in solid-state drives by separating allocation of relocate writes from user writes Oct 28, 2018 Issued
Array ( [id] => 15854457 [patent_doc_number] => 10642511 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Continuous data protection storage media using smart solid state drives [patent_app_type] => utility [patent_app_number] => 16/153536 [patent_app_country] => US [patent_app_date] => 2018-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5018 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16153536 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/153536
Continuous data protection storage media using smart solid state drives Oct 4, 2018 Issued
Array ( [id] => 16494178 [patent_doc_number] => 10860219 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-08 [patent_title] => Performing hybrid wear leveling operations based on a sub-total write counter [patent_app_type] => utility [patent_app_number] => 16/153016 [patent_app_country] => US [patent_app_date] => 2018-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 11361 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 318 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16153016 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/153016
Performing hybrid wear leveling operations based on a sub-total write counter Oct 4, 2018 Issued
Array ( [id] => 14901553 [patent_doc_number] => 20190294542 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => MEMORY SYSTEM AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/153027 [patent_app_country] => US [patent_app_date] => 2018-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10145 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16153027 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/153027
MEMORY SYSTEM AND OPERATING METHOD THEREOF Oct 4, 2018 Abandoned
Array ( [id] => 16744985 [patent_doc_number] => 10969973 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-06 [patent_title] => Software filtered memory devices in computing systems [patent_app_type] => utility [patent_app_number] => 16/137382 [patent_app_country] => US [patent_app_date] => 2018-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 9228 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16137382 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/137382
Software filtered memory devices in computing systems Sep 19, 2018 Issued
Array ( [id] => 15653779 [patent_doc_number] => 20200089420 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => EXPANDABLE MEMORY FOR USE WITH SOLID STATE SYSTEMS AND DEVICES [patent_app_type] => utility [patent_app_number] => 16/136174 [patent_app_country] => US [patent_app_date] => 2018-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11505 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16136174 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/136174
Expandable memory for use with solid state systems and devices Sep 18, 2018 Issued
Array ( [id] => 17164937 [patent_doc_number] => 11151034 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-19 [patent_title] => Cache storage method and system configured to store shareable tag portion and individual tag portion [patent_app_type] => utility [patent_app_number] => 16/129560 [patent_app_country] => US [patent_app_date] => 2018-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 11696 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 382 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16129560 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/129560
Cache storage method and system configured to store shareable tag portion and individual tag portion Sep 11, 2018 Issued
Array ( [id] => 14076891 [patent_doc_number] => 20190087333 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-21 [patent_title] => CONVERTING A STALE CACHE MEMORY UNIQUE REQUEST TO A READ UNIQUE SNOOP RESPONSE IN A MULTIPLE (MULTI-) CENTRAL PROCESSING UNIT (CPU) PROCESSOR TO REDUCE LATENCY ASSOCIATED WITH REISSUING THE STALE UNIQUE REQUEST [patent_app_type] => utility [patent_app_number] => 16/129451 [patent_app_country] => US [patent_app_date] => 2018-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13129 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -30 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16129451 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/129451
CONVERTING A STALE CACHE MEMORY UNIQUE REQUEST TO A READ UNIQUE SNOOP RESPONSE IN A MULTIPLE (MULTI-) CENTRAL PROCESSING UNIT (CPU) PROCESSOR TO REDUCE LATENCY ASSOCIATED WITH REISSUING THE STALE UNIQUE REQUEST Sep 11, 2018 Abandoned
Array ( [id] => 16535287 [patent_doc_number] => 10877888 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-29 [patent_title] => Systems and methods for providing distributed global ordering [patent_app_type] => utility [patent_app_number] => 16/125494 [patent_app_country] => US [patent_app_date] => 2018-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7158 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16125494 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/125494
Systems and methods for providing distributed global ordering Sep 6, 2018 Issued
Array ( [id] => 16263121 [patent_doc_number] => 10754553 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-25 [patent_title] => Memory chip that suspends transfer phase and resumes transfer phase [patent_app_type] => utility [patent_app_number] => 16/125298 [patent_app_country] => US [patent_app_date] => 2018-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 24 [patent_no_of_words] => 13480 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16125298 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/125298
Memory chip that suspends transfer phase and resumes transfer phase Sep 6, 2018 Issued
Array ( [id] => 15854833 [patent_doc_number] => 10642701 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Releasing space on secondary storage device for resynchronization [patent_app_type] => utility [patent_app_number] => 16/124372 [patent_app_country] => US [patent_app_date] => 2018-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 7100 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16124372 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/124372
Releasing space on secondary storage device for resynchronization Sep 6, 2018 Issued
Array ( [id] => 14314725 [patent_doc_number] => 20190147066 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-16 [patent_title] => DIRECTORY STRUCTURE FOR A DISTRIBUTED STORAGE SYSTEM [patent_app_type] => utility [patent_app_number] => 16/121938 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7832 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16121938 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/121938
Directory structure for a distributed storage system Sep 4, 2018 Issued
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