Search

Armand Melendez

Examiner (ID: 2768, Phone: (571)270-0342 , Office: P/1742 )

Most Active Art Unit
1742
Art Unit(s)
1742, 1759
Total Applications
481
Issued Applications
205
Pending Applications
93
Abandoned Applications
214

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8260078 [patent_doc_number] => 08209596 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-06-26 [patent_title] => 'Integrity monitoring system' [patent_app_type] => utility [patent_app_number] => 12/718752 [patent_app_country] => US [patent_app_date] => 2010-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 7499 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12718752 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/718752
Integrity monitoring system Mar 4, 2010 Issued
Array ( [id] => 8627020 [patent_doc_number] => 08359525 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-22 [patent_title] => 'Method and apparatus for transmitting data in optical transport network' [patent_app_type] => utility [patent_app_number] => 12/718495 [patent_app_country] => US [patent_app_date] => 2010-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 6865 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12718495 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/718495
Method and apparatus for transmitting data in optical transport network Mar 4, 2010 Issued
Array ( [id] => 8297352 [patent_doc_number] => 08225155 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-17 [patent_title] => 'JTAG mailbox' [patent_app_type] => utility [patent_app_number] => 12/718274 [patent_app_country] => US [patent_app_date] => 2010-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 24 [patent_no_of_words] => 8605 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12718274 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/718274
JTAG mailbox Mar 4, 2010 Issued
Array ( [id] => 9500146 [patent_doc_number] => 08738986 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-27 [patent_title] => 'Remote presentation over lossy transport with forward error correction' [patent_app_type] => utility [patent_app_number] => 12/718537 [patent_app_country] => US [patent_app_date] => 2010-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 17114 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12718537 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/718537
Remote presentation over lossy transport with forward error correction Mar 4, 2010 Issued
Array ( [id] => 8331639 [patent_doc_number] => 08239716 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-07 [patent_title] => 'On-chip service processor' [patent_app_type] => utility [patent_app_number] => 12/717391 [patent_app_country] => US [patent_app_date] => 2010-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 22 [patent_no_of_words] => 9306 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12717391 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/717391
On-chip service processor Mar 3, 2010 Issued
Array ( [id] => 6094209 [patent_doc_number] => 20110219289 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-08 [patent_title] => 'COMPARING VALUES OF A BOUNDED DOMAIN' [patent_app_type] => utility [patent_app_number] => 12/715402 [patent_app_country] => US [patent_app_date] => 2010-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5762 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0219/20110219289.pdf [firstpage_image] =>[orig_patent_app_number] => 12715402 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/715402
Comparing values of a bounded domain Mar 1, 2010 Issued
Array ( [id] => 4462662 [patent_doc_number] => 07895510 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-22 [patent_title] => 'Navigation of an N-dimensional hierarchical structure using a 2-dimensional controller' [patent_app_type] => utility [patent_app_number] => 12/705048 [patent_app_country] => US [patent_app_date] => 2010-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2395 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/895/07895510.pdf [firstpage_image] =>[orig_patent_app_number] => 12705048 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/705048
Navigation of an N-dimensional hierarchical structure using a 2-dimensional controller Feb 11, 2010 Issued
Array ( [id] => 4472518 [patent_doc_number] => 07937636 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-03 [patent_title] => 'Semiconductor device and inspection method of semiconductor device and wireless chip' [patent_app_type] => utility [patent_app_number] => 12/692785 [patent_app_country] => US [patent_app_date] => 2010-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 39 [patent_no_of_words] => 13054 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/937/07937636.pdf [firstpage_image] =>[orig_patent_app_number] => 12692785 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/692785
Semiconductor device and inspection method of semiconductor device and wireless chip Jan 24, 2010 Issued
Array ( [id] => 8804990 [patent_doc_number] => 08443274 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-14 [patent_title] => 'Test circuit for testing execution of a handshake protocol and method for testing execution of handshake protocol' [patent_app_type] => utility [patent_app_number] => 13/138360 [patent_app_country] => US [patent_app_date] => 2010-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 7450 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13138360 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/138360
Test circuit for testing execution of a handshake protocol and method for testing execution of handshake protocol Jan 17, 2010 Issued
Array ( [id] => 6253323 [patent_doc_number] => 20100138721 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-03 [patent_title] => 'Overlapping sub-matrix based LDPC (Low Density Parity Check) decoder' [patent_app_type] => utility [patent_app_number] => 12/651453 [patent_app_country] => US [patent_app_date] => 2010-01-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 14773 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0138/20100138721.pdf [firstpage_image] =>[orig_patent_app_number] => 12651453 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/651453
Overlapping sub-matrix based LDPC (low density parity check) decoder Dec 31, 2009 Issued
Array ( [id] => 7679590 [patent_doc_number] => 20100106997 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-29 [patent_title] => 'METHOD AND APPARATUS FOR GENERATING EXPECT DATA FROM A CAPTURED BIT PATTERN, AND MEMORY DEVICE USING SAME' [patent_app_type] => utility [patent_app_number] => 12/649137 [patent_app_country] => US [patent_app_date] => 2009-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 15619 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20100106997.pdf [firstpage_image] =>[orig_patent_app_number] => 12649137 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/649137
Method and apparatus for generating expect data from a captured bit pattern, and memory device using same Dec 28, 2009 Issued
Array ( [id] => 4573407 [patent_doc_number] => 07962812 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-14 [patent_title] => 'Scan controller control input to sequential core without scan path' [patent_app_type] => utility [patent_app_number] => 12/638539 [patent_app_country] => US [patent_app_date] => 2009-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 52 [patent_no_of_words] => 27258 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/962/07962812.pdf [firstpage_image] =>[orig_patent_app_number] => 12638539 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/638539
Scan controller control input to sequential core without scan path Dec 14, 2009 Issued
Array ( [id] => 6388623 [patent_doc_number] => 20100083063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-01 [patent_title] => 'PHASE SHIFTER WITH REDUCED LINEAR DEPENDENCY' [patent_app_type] => utility [patent_app_number] => 12/633601 [patent_app_country] => US [patent_app_date] => 2009-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9788 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20100083063.pdf [firstpage_image] =>[orig_patent_app_number] => 12633601 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/633601
Phase shifter with reduced linear dependency Dec 7, 2009 Issued
Array ( [id] => 6594882 [patent_doc_number] => 20100275075 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-28 [patent_title] => 'Deterministic Logic Built-In Self-Test Stimuli Generation' [patent_app_type] => utility [patent_app_number] => 12/629038 [patent_app_country] => US [patent_app_date] => 2009-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3299 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0275/20100275075.pdf [firstpage_image] =>[orig_patent_app_number] => 12629038 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/629038
Deterministic logic built-in self-test stimuli generation Nov 30, 2009 Issued
Array ( [id] => 9276052 [patent_doc_number] => 08639999 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-28 [patent_title] => 'Base station apparatus, mobile terminal apparatus, mobile communication system and information retransmission method' [patent_app_type] => utility [patent_app_number] => 13/126706 [patent_app_country] => US [patent_app_date] => 2009-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 11280 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13126706 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/126706
Base station apparatus, mobile terminal apparatus, mobile communication system and information retransmission method Oct 28, 2009 Issued
Array ( [id] => 4540372 [patent_doc_number] => 07954021 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-31 [patent_title] => 'Solid state drive with flash sparing' [patent_app_type] => utility [patent_app_number] => 12/604614 [patent_app_country] => US [patent_app_date] => 2009-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3302 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/954/07954021.pdf [firstpage_image] =>[orig_patent_app_number] => 12604614 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/604614
Solid state drive with flash sparing Oct 22, 2009 Issued
Array ( [id] => 8260077 [patent_doc_number] => 08209591 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-26 [patent_title] => 'Voter tester for redundant systems' [patent_app_type] => utility [patent_app_number] => 12/604292 [patent_app_country] => US [patent_app_date] => 2009-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3374 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12604292 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/604292
Voter tester for redundant systems Oct 21, 2009 Issued
Array ( [id] => 9102769 [patent_doc_number] => 08566663 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-22 [patent_title] => 'Method for transmitting and receiving signalling information' [patent_app_type] => utility [patent_app_number] => 12/998418 [patent_app_country] => US [patent_app_date] => 2009-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3085 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12998418 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/998418
Method for transmitting and receiving signalling information Oct 15, 2009 Issued
Array ( [id] => 7680986 [patent_doc_number] => 20100023822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-28 [patent_title] => 'IP CORE DESIGN SUPPORTING USER-ADDED SCAN REGISTER OPTION' [patent_app_type] => utility [patent_app_number] => 12/575893 [patent_app_country] => US [patent_app_date] => 2009-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3510 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20100023822.pdf [firstpage_image] =>[orig_patent_app_number] => 12575893 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/575893
Core test circuits controlling boundary and general external scan circuits Oct 7, 2009 Issued
Array ( [id] => 6125637 [patent_doc_number] => 20110078537 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-31 [patent_title] => 'ERROR DETECTION AND CORRECTION FOR EXTERNAL DRAM' [patent_app_type] => utility [patent_app_number] => 12/568639 [patent_app_country] => US [patent_app_date] => 2009-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 11662 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0078/20110078537.pdf [firstpage_image] =>[orig_patent_app_number] => 12568639 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/568639
Error detection and correction for external DRAM Sep 27, 2009 Issued
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