Search

Armand Melendez

Examiner (ID: 2768, Phone: (571)270-0342 , Office: P/1742 )

Most Active Art Unit
1742
Art Unit(s)
1742, 1759
Total Applications
481
Issued Applications
205
Pending Applications
93
Abandoned Applications
214

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5411872 [patent_doc_number] => 20090125771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-14 [patent_title] => 'Scan Based Testing of an Integrated Circuit Containing Circuit Portions Operable in Different Clock Domains during Functional Mode' [patent_app_type] => utility [patent_app_number] => 12/247228 [patent_app_country] => US [patent_app_date] => 2008-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7105 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0125/20090125771.pdf [firstpage_image] =>[orig_patent_app_number] => 12247228 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/247228
Scan based testing of an integrated circuit containing circuit portions operable in different clock domains during functional mode Oct 7, 2008 Issued
Array ( [id] => 7780056 [patent_doc_number] => 08122313 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-21 [patent_title] => 'Acknowledgment packet' [patent_app_type] => utility [patent_app_number] => 12/246475 [patent_app_country] => US [patent_app_date] => 2008-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7202 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/122/08122313.pdf [firstpage_image] =>[orig_patent_app_number] => 12246475 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/246475
Acknowledgment packet Oct 5, 2008 Issued
Array ( [id] => 8120275 [patent_doc_number] => 08161360 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-04-17 [patent_title] => 'Integrated interleaved codes' [patent_app_type] => utility [patent_app_number] => 12/287053 [patent_app_country] => US [patent_app_date] => 2008-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5662 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/161/08161360.pdf [firstpage_image] =>[orig_patent_app_number] => 12287053 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/287053
Integrated interleaved codes Oct 1, 2008 Issued
Array ( [id] => 4550469 [patent_doc_number] => 07873896 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-18 [patent_title] => 'High performance pulsed storage circuit' [patent_app_type] => utility [patent_app_number] => 12/285327 [patent_app_country] => US [patent_app_date] => 2008-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4941 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/873/07873896.pdf [firstpage_image] =>[orig_patent_app_number] => 12285327 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/285327
High performance pulsed storage circuit Sep 30, 2008 Issued
Array ( [id] => 5535355 [patent_doc_number] => 20090235143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-17 [patent_title] => 'LDPC-CODED MULTILEVEL MODULATION SCHEME' [patent_app_type] => utility [patent_app_number] => 12/242205 [patent_app_country] => US [patent_app_date] => 2008-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2675 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20090235143.pdf [firstpage_image] =>[orig_patent_app_number] => 12242205 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/242205
LDPC-coded multilevel modulation scheme Sep 29, 2008 Issued
Array ( [id] => 4511200 [patent_doc_number] => 07949921 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-24 [patent_title] => 'Method and apparatus for synthesis of augmented multimode compactors' [patent_app_type] => utility [patent_app_number] => 12/235341 [patent_app_country] => US [patent_app_date] => 2008-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 22 [patent_no_of_words] => 12836 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/949/07949921.pdf [firstpage_image] =>[orig_patent_app_number] => 12235341 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/235341
Method and apparatus for synthesis of augmented multimode compactors Sep 21, 2008 Issued
Array ( [id] => 7706395 [patent_doc_number] => 08090998 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-03 [patent_title] => 'Method and apparatus for managing disc defects using updateable DMA, and disc thereof' [patent_app_type] => utility [patent_app_number] => 12/233710 [patent_app_country] => US [patent_app_date] => 2008-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 7778 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/090/08090998.pdf [firstpage_image] =>[orig_patent_app_number] => 12233710 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/233710
Method and apparatus for managing disc defects using updateable DMA, and disc thereof Sep 18, 2008 Issued
Array ( [id] => 5587407 [patent_doc_number] => 20090106609 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-23 [patent_title] => 'Semiconductor integrated circuit and debug mode determination method' [patent_app_type] => utility [patent_app_number] => 12/232178 [patent_app_country] => US [patent_app_date] => 2008-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8746 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20090106609.pdf [firstpage_image] =>[orig_patent_app_number] => 12232178 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/232178
Semiconductor integrated circuit and debug mode determination method Sep 10, 2008 Issued
Array ( [id] => 4550492 [patent_doc_number] => 07873897 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-18 [patent_title] => 'Devices and methods for bit-level coding and decoding of turbo codes' [patent_app_type] => utility [patent_app_number] => 12/203709 [patent_app_country] => US [patent_app_date] => 2008-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8475 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/873/07873897.pdf [firstpage_image] =>[orig_patent_app_number] => 12203709 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/203709
Devices and methods for bit-level coding and decoding of turbo codes Sep 2, 2008 Issued
Array ( [id] => 7595715 [patent_doc_number] => 07620867 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-17 [patent_title] => 'IP core design supporting user-added scan register option' [patent_app_type] => utility [patent_app_number] => 12/203475 [patent_app_country] => US [patent_app_date] => 2008-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3485 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/620/07620867.pdf [firstpage_image] =>[orig_patent_app_number] => 12203475 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/203475
IP core design supporting user-added scan register option Sep 2, 2008 Issued
Array ( [id] => 4488696 [patent_doc_number] => 07908533 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-15 [patent_title] => 'Processor to JTAG test access port interface' [patent_app_type] => utility [patent_app_number] => 12/203109 [patent_app_country] => US [patent_app_date] => 2008-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 7144 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/908/07908533.pdf [firstpage_image] =>[orig_patent_app_number] => 12203109 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/203109
Processor to JTAG test access port interface Sep 1, 2008 Issued
Array ( [id] => 5325927 [patent_doc_number] => 20090063917 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-05 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/199181 [patent_app_country] => US [patent_app_date] => 2008-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6427 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20090063917.pdf [firstpage_image] =>[orig_patent_app_number] => 12199181 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/199181
Built-in self testing circuit with fault diagnostic capability Aug 26, 2008 Issued
Array ( [id] => 6227769 [patent_doc_number] => 20100058126 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-04 [patent_title] => 'Programmable Self-Test for Random Access Memories' [patent_app_type] => utility [patent_app_number] => 12/198949 [patent_app_country] => US [patent_app_date] => 2008-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4284 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0058/20100058126.pdf [firstpage_image] =>[orig_patent_app_number] => 12198949 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/198949
Programmable self-test for random access memories Aug 26, 2008 Issued
Array ( [id] => 4951155 [patent_doc_number] => 20080307281 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-11 [patent_title] => 'TRADING PROPENSITY-BASED CLUSTERING OF CIRCUIT ELEMENTS IN A CIRCUIT DESIGN' [patent_app_type] => utility [patent_app_number] => 12/191654 [patent_app_country] => US [patent_app_date] => 2008-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9151 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0307/20080307281.pdf [firstpage_image] =>[orig_patent_app_number] => 12191654 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/191654
TRADING PROPENSITY-BASED CLUSTERING OF CIRCUIT ELEMENTS IN A CIRCUIT DESIGN Aug 13, 2008 Abandoned
Array ( [id] => 19044 [patent_doc_number] => 07809996 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-05 [patent_title] => 'Adaptive FEC codeword management' [patent_app_type] => utility [patent_app_number] => 12/185729 [patent_app_country] => US [patent_app_date] => 2008-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 11906 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/809/07809996.pdf [firstpage_image] =>[orig_patent_app_number] => 12185729 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/185729
Adaptive FEC codeword management Aug 3, 2008 Issued
Array ( [id] => 4793873 [patent_doc_number] => 20080294847 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-27 [patent_title] => 'Cache control device and computer-readable recording medium storing cache control program' [patent_app_type] => utility [patent_app_number] => 12/222053 [patent_app_country] => US [patent_app_date] => 2008-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4813 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0294/20080294847.pdf [firstpage_image] =>[orig_patent_app_number] => 12222053 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/222053
Cache control device and computer-readable recording medium storing cache control program Jul 30, 2008 Abandoned
Array ( [id] => 5289270 [patent_doc_number] => 20090022000 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-22 [patent_title] => 'SEMICONDUCTOR STORAGE DEVICE AND TEST METHOD THEREFOR' [patent_app_type] => utility [patent_app_number] => 12/174656 [patent_app_country] => US [patent_app_date] => 2008-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8582 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20090022000.pdf [firstpage_image] =>[orig_patent_app_number] => 12174656 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/174656
Semiconductor storage device and test method therefor Jul 16, 2008 Issued
Array ( [id] => 27456 [patent_doc_number] => 07802159 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-09-21 [patent_title] => 'Enhanced logic built-in self-test module and method of online system testing employing the same' [patent_app_type] => utility [patent_app_number] => 12/170030 [patent_app_country] => US [patent_app_date] => 2008-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 4446 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/802/07802159.pdf [firstpage_image] =>[orig_patent_app_number] => 12170030 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/170030
Enhanced logic built-in self-test module and method of online system testing employing the same Jul 8, 2008 Issued
Array ( [id] => 4793979 [patent_doc_number] => 20080294953 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-27 [patent_title] => 'Removing the effects of unknown test values from compacted test responses' [patent_app_type] => utility [patent_app_number] => 12/215593 [patent_app_country] => US [patent_app_date] => 2008-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 17234 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0294/20080294953.pdf [firstpage_image] =>[orig_patent_app_number] => 12215593 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/215593
Removing the effects of unknown test values from compacted test responses Jun 26, 2008 Issued
Array ( [id] => 8194835 [patent_doc_number] => 08185795 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-05-22 [patent_title] => 'Side channel for forward error correction used with long-haul IP links' [patent_app_type] => utility [patent_app_number] => 12/215430 [patent_app_country] => US [patent_app_date] => 2008-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6055 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/185/08185795.pdf [firstpage_image] =>[orig_patent_app_number] => 12215430 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/215430
Side channel for forward error correction used with long-haul IP links Jun 26, 2008 Issued
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