Armand Melendez

Array ( [id] => 7689873 [patent_doc_number] => 20070234160 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-04 [patent_title] => 'Self test device and self test method for reconfigurable device mounted board' [patent_app_type] => utility [patent_app_number] => 11/451053 [patent_app_country] => US [patent_app_date] => 2006-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5837 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0234/20070234160.pdf [firstpage_image] =>[orig_patent_app_number] => 11451053 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 375006 [patent_doc_number] => 07475314 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-01-06 [patent_title] => 'Mechanism for read-only memory built-in self-test' [patent_app_type] => utility [patent_app_number] => 11/450722 [patent_app_country] => US [patent_app_date] => 2006-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 5417 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/475/07475314.pdf [firstpage_image] =>[orig_patent_app_number] => 11450722 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5167229 [patent_doc_number] => 20070288818 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-13 [patent_title] => 'IC functional and delay fault testing' [patent_app_type] => utility [patent_app_number] => 11/450941 [patent_app_country] => US [patent_app_date] => 2006-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8710 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0288/20070288818.pdf [firstpage_image] =>[orig_patent_app_number] => 11450941 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 868983 [patent_doc_number] => 07370253 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-06 [patent_title] => 'Apparatus and method for high-speed SAS link protocol testing' [patent_app_type] => utility [patent_app_number] => 11/448328 [patent_app_country] => US [patent_app_date] => 2006-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1223 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/370/07370253.pdf [firstpage_image] =>[orig_patent_app_number] => 11448328 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4996198 [patent_doc_number] => 20070011543 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-11 [patent_title] => 'Test pattern generation method' [patent_app_type] => utility [patent_app_number] => 11/447302 [patent_app_country] => US [patent_app_date] => 2006-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 45 [patent_no_of_words] => 40907 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0011/20070011543.pdf [firstpage_image] =>[orig_patent_app_number] => 11447302 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5190481 [patent_doc_number] => 20070168790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-19 [patent_title] => 'Apparatus and method for reducing test resources in testing drams' [patent_app_type] => utility [patent_app_number] => 11/445944 [patent_app_country] => US [patent_app_date] => 2006-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4674 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0168/20070168790.pdf [firstpage_image] =>[orig_patent_app_number] => 11445944 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5200799 [patent_doc_number] => 20070300117 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-27 [patent_title] => 'Mapping logic for loading control of crossbar multiplexer select RAM' [patent_app_type] => utility [patent_app_number] => 11/444449 [patent_app_country] => US [patent_app_date] => 2006-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4629 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0300/20070300117.pdf [firstpage_image] =>[orig_patent_app_number] => 11444449 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5012718 [patent_doc_number] => 20070283197 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-06 [patent_title] => 'Mapping logic for controlling loading of the select ram of an error data crossbar multiplexer' [patent_app_type] => utility [patent_app_number] => 11/443732 [patent_app_country] => US [patent_app_date] => 2006-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6860 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0283/20070283197.pdf [firstpage_image] =>[orig_patent_app_number] => 11443732 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5609811 [patent_doc_number] => 20060271327 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-30 [patent_title] => 'SYSTEMS AND METHODS FOR MANAGING MULTI-DEVICE TEST SESSIONS' [patent_app_type] => utility [patent_app_number] => 11/421476 [patent_app_country] => US [patent_app_date] => 2006-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9617 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0271/20060271327.pdf [firstpage_image] =>[orig_patent_app_number] => 11421476 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 605058 [patent_doc_number] => 07434121 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-07 [patent_title] => 'Integrated memory device and method for its testing and manufacture' [patent_app_type] => utility [patent_app_number] => 11/443493 [patent_app_country] => US [patent_app_date] => 2006-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4107 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/434/07434121.pdf [firstpage_image] =>[orig_patent_app_number] => 11443493 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5086971 [patent_doc_number] => 20070277022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-29 [patent_title] => 'METHOD, SYSTEM AND PROGRAM PRODUCT FOR ESTABLISHING DECIMAL FLOATING POINT OPERANDS FOR FACILITATING TESTING OF DECIMAL FLOATING POINT INSTRUCTIONS' [patent_app_type] => utility [patent_app_number] => 11/420045 [patent_app_country] => US [patent_app_date] => 2006-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4981 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0277/20070277022.pdf [firstpage_image] =>[orig_patent_app_number] => 11420045 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 237750 [patent_doc_number] => 07596739 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-09-29 [patent_title] => 'Method and system for data replication' [patent_app_type] => utility [patent_app_number] => 11/434296 [patent_app_country] => US [patent_app_date] => 2006-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7202 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/596/07596739.pdf [firstpage_image] =>[orig_patent_app_number] => 11434296 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 37740 [patent_doc_number] => 07793203 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-07 [patent_title] => 'Fieldbus process communications using error correction' [patent_app_type] => utility [patent_app_number] => 11/433633 [patent_app_country] => US [patent_app_date] => 2006-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3683 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/793/07793203.pdf [firstpage_image] =>[orig_patent_app_number] => 11433633 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5255180 [patent_doc_number] => 20070136636 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-14 [patent_title] => 'Data encoding method for error correction' [patent_app_type] => utility [patent_app_number] => 11/431787 [patent_app_country] => US [patent_app_date] => 2006-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 2932 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0136/20070136636.pdf [firstpage_image] =>[orig_patent_app_number] => 11431787 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 600094 [patent_doc_number] => 07441170 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-21 [patent_title] => 'External scan circuitry connected to leads extending from core circuitry' [patent_app_type] => utility [patent_app_number] => 11/380965 [patent_app_country] => US [patent_app_date] => 2006-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3460 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/441/07441170.pdf [firstpage_image] =>[orig_patent_app_number] => 11380965 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5036683 [patent_doc_number] => 20070101222 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-03 [patent_title] => 'Shift registers free of timing race boundary scan registers with two-phase clock control' [patent_app_type] => utility [patent_app_number] => 11/404353 [patent_app_country] => US [patent_app_date] => 2006-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5987 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0101/20070101222.pdf [firstpage_image] =>[orig_patent_app_number] => 11404353 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7687759 [patent_doc_number] => 20070106939 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-10 [patent_title] => 'Clickleess tool' [patent_app_type] => utility [patent_app_number] => 11/402662 [patent_app_country] => US [patent_app_date] => 2006-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5353 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20070106939.pdf [firstpage_image] =>[orig_patent_app_number] => 11402662 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 823520 [patent_doc_number] => 07409607 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-05 [patent_title] => 'Memory address generating apparatus, processor having the same, and memory address generating method' [patent_app_type] => utility [patent_app_number] => 11/279204 [patent_app_country] => US [patent_app_date] => 2006-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 8327 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/409/07409607.pdf [firstpage_image] =>[orig_patent_app_number] => 11279204 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5504174 [patent_doc_number] => 20090164862 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-25 [patent_title] => 'Method, Receiver And Transmitter For Improved Hybrid Automatic Repeat Request' [patent_app_type] => utility [patent_app_number] => 12/296371 [patent_app_country] => US [patent_app_date] => 2006-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5859 [patent_no_of_claims] => 76 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20090164862.pdf [firstpage_image] =>[orig_patent_app_number] => 12296371 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 840023 [patent_doc_number] => 07395480 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-01 [patent_title] => 'Test apparatus and test method' [patent_app_type] => utility [patent_app_number] => 11/398917 [patent_app_country] => US [patent_app_date] => 2006-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 8586 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/395/07395480.pdf [firstpage_image] =>[orig_patent_app_number] => 11398917 [rel_patent_id] =>[rel_patent_doc_number] =>)