Search

Armand Melendez

Examiner (ID: 2768, Phone: (571)270-0342 , Office: P/1742 )

Most Active Art Unit
1742
Art Unit(s)
1742, 1759
Total Applications
481
Issued Applications
205
Pending Applications
93
Abandoned Applications
214

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 927529 [patent_doc_number] => 07318188 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-01-08 [patent_title] => 'Hardware-efficient CRC generator for high speed communication networks' [patent_app_type] => utility [patent_app_number] => 11/233920 [patent_app_country] => US [patent_app_date] => 2005-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4971 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/318/07318188.pdf [firstpage_image] =>[orig_patent_app_number] => 11233920 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/233920
Hardware-efficient CRC generator for high speed communication networks Sep 21, 2005 Issued
Array ( [id] => 4616621 [patent_doc_number] => 07992074 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-02 [patent_title] => 'Decoding device' [patent_app_type] => utility [patent_app_number] => 11/988240 [patent_app_country] => US [patent_app_date] => 2005-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3677 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/992/07992074.pdf [firstpage_image] =>[orig_patent_app_number] => 11988240 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/988240
Decoding device Sep 12, 2005 Issued
Array ( [id] => 5789111 [patent_doc_number] => 20060206772 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-14 [patent_title] => 'Method and apparatus for supporting test pattern generation, and computer product' [patent_app_type] => utility [patent_app_number] => 11/214849 [patent_app_country] => US [patent_app_date] => 2005-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4386 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0206/20060206772.pdf [firstpage_image] =>[orig_patent_app_number] => 11214849 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/214849
Method and apparatus for supporting test pattern generation, and computer product Aug 30, 2005 Abandoned
Array ( [id] => 799084 [patent_doc_number] => 07428678 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-09-23 [patent_title] => 'Scan testing of integrated circuits with high-speed serial interface' [patent_app_type] => utility [patent_app_number] => 11/215278 [patent_app_country] => US [patent_app_date] => 2005-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4437 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/428/07428678.pdf [firstpage_image] =>[orig_patent_app_number] => 11215278 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/215278
Scan testing of integrated circuits with high-speed serial interface Aug 29, 2005 Issued
Array ( [id] => 404305 [patent_doc_number] => 07293213 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-11-06 [patent_title] => 'Method for detecting software errors and vulnerabilities' [patent_app_type] => utility [patent_app_number] => 11/214420 [patent_app_country] => US [patent_app_date] => 2005-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3108 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/293/07293213.pdf [firstpage_image] =>[orig_patent_app_number] => 11214420 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/214420
Method for detecting software errors and vulnerabilities Aug 28, 2005 Issued
Array ( [id] => 600430 [patent_doc_number] => 07437640 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-14 [patent_title] => 'Fault diagnosis of compressed test responses having one or more unknown states' [patent_app_type] => utility [patent_app_number] => 11/213672 [patent_app_country] => US [patent_app_date] => 2005-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 29 [patent_no_of_words] => 28844 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/437/07437640.pdf [firstpage_image] =>[orig_patent_app_number] => 11213672 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/213672
Fault diagnosis of compressed test responses having one or more unknown states Aug 24, 2005 Issued
Array ( [id] => 393005 [patent_doc_number] => 07302624 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-27 [patent_title] => 'Adaptive fault diagnosis of compressed test responses' [patent_app_type] => utility [patent_app_number] => 11/213327 [patent_app_country] => US [patent_app_date] => 2005-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 29 [patent_no_of_words] => 28849 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/302/07302624.pdf [firstpage_image] =>[orig_patent_app_number] => 11213327 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/213327
Adaptive fault diagnosis of compressed test responses Aug 24, 2005 Issued
Array ( [id] => 5836558 [patent_doc_number] => 20060248390 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-02 [patent_title] => 'Test program debugger device, semiconductor test apparatus, test program debugging method and test method' [patent_app_type] => utility [patent_app_number] => 11/211162 [patent_app_country] => US [patent_app_date] => 2005-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4794 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0248/20060248390.pdf [firstpage_image] =>[orig_patent_app_number] => 11211162 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/211162
Test program debugger device, semiconductor test apparatus, test program debugging method and test method Aug 23, 2005 Issued
Array ( [id] => 5882643 [patent_doc_number] => 20060031726 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-09 [patent_title] => 'Programmable multi-mode built-in self-test and self-repair structure for embedded memory arrays' [patent_app_type] => utility [patent_app_number] => 11/197989 [patent_app_country] => US [patent_app_date] => 2005-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4948 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20060031726.pdf [firstpage_image] =>[orig_patent_app_number] => 11197989 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/197989
Programmable multi-mode built-in self-test and self-repair structure for embedded memory arrays Aug 4, 2005 Issued
Array ( [id] => 411508 [patent_doc_number] => 07287203 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-10-23 [patent_title] => 'Testing embedded RAM blocks by employing RAM scan techniques' [patent_app_type] => utility [patent_app_number] => 11/194540 [patent_app_country] => US [patent_app_date] => 2005-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 3659 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/287/07287203.pdf [firstpage_image] =>[orig_patent_app_number] => 11194540 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/194540
Testing embedded RAM blocks by employing RAM scan techniques Aug 1, 2005 Issued
Array ( [id] => 372089 [patent_doc_number] => 07478288 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-01-13 [patent_title] => 'Method and apparatus for recording data on and reproducing data from a recording medium and the recording medium' [patent_app_type] => utility [patent_app_number] => 11/193532 [patent_app_country] => US [patent_app_date] => 2005-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5529 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/478/07478288.pdf [firstpage_image] =>[orig_patent_app_number] => 11193532 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/193532
Method and apparatus for recording data on and reproducing data from a recording medium and the recording medium Jul 31, 2005 Issued
Array ( [id] => 5795112 [patent_doc_number] => 20060015793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-19 [patent_title] => 'Method of combining multilevel memory cells for an error correction scheme' [patent_app_type] => utility [patent_app_number] => 11/183601 [patent_app_country] => US [patent_app_date] => 2005-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1796 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0015/20060015793.pdf [firstpage_image] =>[orig_patent_app_number] => 11183601 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/183601
Method of combining multilevel memory cells for an error correction scheme Jul 17, 2005 Issued
Array ( [id] => 5592346 [patent_doc_number] => 20060041799 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-23 [patent_title] => 'Test apparatus, phase adjusting method and memory controller' [patent_app_type] => utility [patent_app_number] => 11/180895 [patent_app_country] => US [patent_app_date] => 2005-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8657 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0041/20060041799.pdf [firstpage_image] =>[orig_patent_app_number] => 11180895 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/180895
Test apparatus, phase adjusting method and memory controller Jul 12, 2005 Issued
Array ( [id] => 5052914 [patent_doc_number] => 20070033459 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-08 [patent_title] => 'Method for enabling scan of defective ram prior to repair' [patent_app_type] => utility [patent_app_number] => 11/180416 [patent_app_country] => US [patent_app_date] => 2005-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2481 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20070033459.pdf [firstpage_image] =>[orig_patent_app_number] => 11180416 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/180416
Method for enabling scan of defective ram prior to repair Jul 12, 2005 Issued
Array ( [id] => 4996183 [patent_doc_number] => 20070011528 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-11 [patent_title] => 'Method and apparatus for testing an ultrasound system' [patent_app_type] => utility [patent_app_number] => 11/154442 [patent_app_country] => US [patent_app_date] => 2005-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5522 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0011/20070011528.pdf [firstpage_image] =>[orig_patent_app_number] => 11154442 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/154442
Method and apparatus for testing an ultrasound system Jun 15, 2005 Issued
Array ( [id] => 4996193 [patent_doc_number] => 20070011538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-11 [patent_title] => 'CIRCUIT AND METHOD FOR PERFORMING BUILT-IN SELF TEST AND COMPUTER READABLE RECORDING MEDIUM FOR STORING PROGRAM THEREOF' [patent_app_type] => utility [patent_app_number] => 11/160102 [patent_app_country] => US [patent_app_date] => 2005-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2718 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0011/20070011538.pdf [firstpage_image] =>[orig_patent_app_number] => 11160102 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/160102
Circuit and method for performing built-in self test and computer readable recording medium for storing program thereof Jun 8, 2005 Issued
Array ( [id] => 5734697 [patent_doc_number] => 20060259814 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-16 [patent_title] => 'Method and system for optimizing testing of memory stores' [patent_app_type] => utility [patent_app_number] => 11/127590 [patent_app_country] => US [patent_app_date] => 2005-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4331 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0259/20060259814.pdf [firstpage_image] =>[orig_patent_app_number] => 11127590 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/127590
Method and system for optimizing testing of memory stores May 11, 2005 Issued
Array ( [id] => 5663150 [patent_doc_number] => 20060253746 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-09 [patent_title] => 'Phase adjust using relative error' [patent_app_type] => utility [patent_app_number] => 11/123355 [patent_app_country] => US [patent_app_date] => 2005-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8292 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20060253746.pdf [firstpage_image] =>[orig_patent_app_number] => 11123355 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/123355
Phase adjust using relative error May 3, 2005 Issued
Array ( [id] => 5836579 [patent_doc_number] => 20060248411 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-02 [patent_title] => 'Methods and apparatus for reducing memory errors' [patent_app_type] => utility [patent_app_number] => 11/116625 [patent_app_country] => US [patent_app_date] => 2005-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5217 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0248/20060248411.pdf [firstpage_image] =>[orig_patent_app_number] => 11116625 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/116625
Methods and apparatus for reducing memory errors Apr 27, 2005 Issued
Array ( [id] => 5919552 [patent_doc_number] => 20060239088 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-26 [patent_title] => 'METHOD AND APPARATUS FOR INCREASING FUSE PROGRAMMING YIELD THROUGH PREFERRED USE OF DUPLICATE DATA' [patent_app_type] => utility [patent_app_number] => 10/908033 [patent_app_country] => US [patent_app_date] => 2005-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8160 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0239/20060239088.pdf [firstpage_image] =>[orig_patent_app_number] => 10908033 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/908033
Method and apparatus for increasing fuse programming yield through preferred use of duplicate data Apr 25, 2005 Issued
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