Search

Armand Melendez

Examiner (ID: 2768, Phone: (571)270-0342 , Office: P/1742 )

Most Active Art Unit
1742
Art Unit(s)
1742, 1759
Total Applications
481
Issued Applications
205
Pending Applications
93
Abandoned Applications
214

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 431473 [patent_doc_number] => 07269771 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-09-11 [patent_title] => 'Semiconductor device adapted for forming multiple scan chains' [patent_app_type] => utility [patent_app_number] => 10/676536 [patent_app_country] => US [patent_app_date] => 2003-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3042 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/269/07269771.pdf [firstpage_image] =>[orig_patent_app_number] => 10676536 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/676536
Semiconductor device adapted for forming multiple scan chains Sep 29, 2003 Issued
Array ( [id] => 7118968 [patent_doc_number] => 20050071715 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-31 [patent_title] => 'Method and system for graphical pin assignment and/or verification' [patent_app_type] => utility [patent_app_number] => 10/676517 [patent_app_country] => US [patent_app_date] => 2003-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11239 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0071/20050071715.pdf [firstpage_image] =>[orig_patent_app_number] => 10676517 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/676517
Method and system for graphical pin assignment and/or verification Sep 29, 2003 Issued
Array ( [id] => 7271461 [patent_doc_number] => 20040059979 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-25 [patent_title] => 'Retransmission procedure and apparatus for handshaking protocol' [patent_app_type] => new [patent_app_number] => 10/671536 [patent_app_country] => US [patent_app_date] => 2003-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8802 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20040059979.pdf [firstpage_image] =>[orig_patent_app_number] => 10671536 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/671536
Retransmission procedure and apparatus for handshaking protocol Sep 28, 2003 Issued
Array ( [id] => 637621 [patent_doc_number] => 07131043 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-10-31 [patent_title] => 'Automatic testing for programmable networks of control signals' [patent_app_type] => utility [patent_app_number] => 10/671891 [patent_app_country] => US [patent_app_date] => 2003-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2655 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/131/07131043.pdf [firstpage_image] =>[orig_patent_app_number] => 10671891 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/671891
Automatic testing for programmable networks of control signals Sep 24, 2003 Issued
Array ( [id] => 554984 [patent_doc_number] => 07181657 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-20 [patent_title] => 'Data transmission apparatus adaptive to data quality on radio-transmission and a method of data transmission therefor' [patent_app_type] => utility [patent_app_number] => 10/669254 [patent_app_country] => US [patent_app_date] => 2003-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8277 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/181/07181657.pdf [firstpage_image] =>[orig_patent_app_number] => 10669254 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/669254
Data transmission apparatus adaptive to data quality on radio-transmission and a method of data transmission therefor Sep 24, 2003 Issued
Array ( [id] => 563085 [patent_doc_number] => 07165201 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-16 [patent_title] => 'Method for performing testing of a simulated storage device within a testing simulation environment' [patent_app_type] => utility [patent_app_number] => 10/670547 [patent_app_country] => US [patent_app_date] => 2003-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5629 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/165/07165201.pdf [firstpage_image] =>[orig_patent_app_number] => 10670547 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/670547
Method for performing testing of a simulated storage device within a testing simulation environment Sep 24, 2003 Issued
Array ( [id] => 7118972 [patent_doc_number] => 20050071719 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-31 [patent_title] => 'Method and apparatus for diagnosis and behavior modification of an embedded microcontroller' [patent_app_type] => utility [patent_app_number] => 10/671060 [patent_app_country] => US [patent_app_date] => 2003-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3949 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0071/20050071719.pdf [firstpage_image] =>[orig_patent_app_number] => 10671060 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/671060
Method and apparatus for diagnosis and behavior modification of an embedded microcontroller Sep 24, 2003 Issued
Array ( [id] => 905109 [patent_doc_number] => 07340661 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-04 [patent_title] => 'Computer program product for performing testing of a simulated storage device within a testing simulation environment' [patent_app_type] => utility [patent_app_number] => 10/670548 [patent_app_country] => US [patent_app_date] => 2003-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5640 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/340/07340661.pdf [firstpage_image] =>[orig_patent_app_number] => 10670548 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/670548
Computer program product for performing testing of a simulated storage device within a testing simulation environment Sep 24, 2003 Issued
Array ( [id] => 706964 [patent_doc_number] => 07065694 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-20 [patent_title] => 'Adaptive runtime repairable entry register file' [patent_app_type] => utility [patent_app_number] => 10/670713 [patent_app_country] => US [patent_app_date] => 2003-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5343 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/065/07065694.pdf [firstpage_image] =>[orig_patent_app_number] => 10670713 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/670713
Adaptive runtime repairable entry register file Sep 24, 2003 Issued
Array ( [id] => 7118970 [patent_doc_number] => 20050071717 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-31 [patent_title] => 'Method and apparatus for low overhead circuit scan' [patent_app_type] => utility [patent_app_number] => 10/670832 [patent_app_country] => US [patent_app_date] => 2003-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4996 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0071/20050071717.pdf [firstpage_image] =>[orig_patent_app_number] => 10670832 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/670832
Method and apparatus for low overhead circuit scan Sep 24, 2003 Issued
Array ( [id] => 7374364 [patent_doc_number] => 20040093542 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-13 [patent_title] => 'Logic circuit test apparatus and logic circuit test method' [patent_app_type] => new [patent_app_number] => 10/668370 [patent_app_country] => US [patent_app_date] => 2003-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 16297 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20040093542.pdf [firstpage_image] =>[orig_patent_app_number] => 10668370 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/668370
Logic circuit test apparatus and logic circuit test method Sep 23, 2003 Issued
Array ( [id] => 7460640 [patent_doc_number] => 20040068686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-08 [patent_title] => 'Retransmission procedure and apparatus for handshaking protocol' [patent_app_type] => new [patent_app_number] => 10/663712 [patent_app_country] => US [patent_app_date] => 2003-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8814 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20040068686.pdf [firstpage_image] =>[orig_patent_app_number] => 10663712 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/663712
Retransmission procedure and apparatus for handshaking protocol Sep 16, 2003 Issued
Array ( [id] => 7361074 [patent_doc_number] => 20040049718 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-11 [patent_title] => 'Transponder interrogators, radio frequency identification device communication systems, transponder interrogator communication methods, and radio frequency identification device communication methods' [patent_app_type] => new [patent_app_number] => 10/655653 [patent_app_country] => US [patent_app_date] => 2003-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7215 [patent_no_of_claims] => 61 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20040049718.pdf [firstpage_image] =>[orig_patent_app_number] => 10655653 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/655653
Transponder interrogators, radio frequency identification device communication systems, transponder interrogator communication methods, and radio frequency identification device communication methods Sep 4, 2003 Issued
Array ( [id] => 684899 [patent_doc_number] => 07085975 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-01 [patent_title] => 'Method and apparatus for generating expect data from a captured bit pattern, and memory device using same' [patent_app_type] => utility [patent_app_number] => 10/648567 [patent_app_country] => US [patent_app_date] => 2003-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 15787 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 19 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/085/07085975.pdf [firstpage_image] =>[orig_patent_app_number] => 10648567 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/648567
Method and apparatus for generating expect data from a captured bit pattern, and memory device using same Aug 24, 2003 Issued
Array ( [id] => 1017347 [patent_doc_number] => 06895543 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-17 [patent_title] => 'Multilevel semiconductor memory, write/read method thereto/therefrom and storage medium storing write/read program' [patent_app_type] => utility [patent_app_number] => 10/643222 [patent_app_country] => US [patent_app_date] => 2003-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 16602 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/895/06895543.pdf [firstpage_image] =>[orig_patent_app_number] => 10643222 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/643222
Multilevel semiconductor memory, write/read method thereto/therefrom and storage medium storing write/read program Aug 18, 2003 Issued
Array ( [id] => 458248 [patent_doc_number] => 07249299 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-07-24 [patent_title] => 'Bidirectional horizontal scan circuit with sub-sampling and horizontal adding functions' [patent_app_type] => utility [patent_app_number] => 10/641605 [patent_app_country] => US [patent_app_date] => 2003-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2601 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/249/07249299.pdf [firstpage_image] =>[orig_patent_app_number] => 10641605 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/641605
Bidirectional horizontal scan circuit with sub-sampling and horizontal adding functions Aug 14, 2003 Issued
Array ( [id] => 563010 [patent_doc_number] => 07165195 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-16 [patent_title] => 'Method, system, and apparatus for bit error capture and analysis for serial interfaces' [patent_app_type] => utility [patent_app_number] => 10/641613 [patent_app_country] => US [patent_app_date] => 2003-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 3 [patent_no_of_words] => 1850 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/165/07165195.pdf [firstpage_image] =>[orig_patent_app_number] => 10641613 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/641613
Method, system, and apparatus for bit error capture and analysis for serial interfaces Aug 14, 2003 Issued
Array ( [id] => 731699 [patent_doc_number] => 07047463 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-05-16 [patent_title] => 'Method and system for automatically determining a testing order when executing a test flow' [patent_app_type] => utility [patent_app_number] => 10/642000 [patent_app_country] => US [patent_app_date] => 2003-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7998 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/047/07047463.pdf [firstpage_image] =>[orig_patent_app_number] => 10642000 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/642000
Method and system for automatically determining a testing order when executing a test flow Aug 14, 2003 Issued
Array ( [id] => 680290 [patent_doc_number] => 07089471 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-08 [patent_title] => 'Scan testing mode control of gated clock signals for flip-flops' [patent_app_type] => utility [patent_app_number] => 10/640686 [patent_app_country] => US [patent_app_date] => 2003-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2783 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/089/07089471.pdf [firstpage_image] =>[orig_patent_app_number] => 10640686 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/640686
Scan testing mode control of gated clock signals for flip-flops Aug 13, 2003 Issued
Array ( [id] => 717081 [patent_doc_number] => 07058868 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-06 [patent_title] => 'Scan testing mode control of gated clock signals for memory devices' [patent_app_type] => utility [patent_app_number] => 10/640659 [patent_app_country] => US [patent_app_date] => 2003-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3488 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/058/07058868.pdf [firstpage_image] =>[orig_patent_app_number] => 10640659 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/640659
Scan testing mode control of gated clock signals for memory devices Aug 13, 2003 Issued
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