Search

Armand Melendez

Examiner (ID: 2768, Phone: (571)270-0342 , Office: P/1742 )

Most Active Art Unit
1742
Art Unit(s)
1742, 1759
Total Applications
481
Issued Applications
205
Pending Applications
93
Abandoned Applications
214

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7277561 [patent_doc_number] => 20040237012 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-25 [patent_title] => 'Generating a test sequence using a satisfiability technique' [patent_app_type] => new [patent_app_number] => 10/444483 [patent_app_country] => US [patent_app_date] => 2003-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4895 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20040237012.pdf [firstpage_image] =>[orig_patent_app_number] => 10444483 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/444483
Generating a test sequence using a satisfiability technique May 21, 2003 Issued
Array ( [id] => 717074 [patent_doc_number] => 07058864 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-06-06 [patent_title] => 'Test for processor memory cache' [patent_app_type] => utility [patent_app_number] => 10/442453 [patent_app_country] => US [patent_app_date] => 2003-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3135 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/058/07058864.pdf [firstpage_image] =>[orig_patent_app_number] => 10442453 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/442453
Test for processor memory cache May 20, 2003 Issued
Array ( [id] => 717080 [patent_doc_number] => 07058867 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-06 [patent_title] => 'Logic circuit and methods for designing and testing the same' [patent_app_type] => utility [patent_app_number] => 10/442225 [patent_app_country] => US [patent_app_date] => 2003-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4469 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/058/07058867.pdf [firstpage_image] =>[orig_patent_app_number] => 10442225 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/442225
Logic circuit and methods for designing and testing the same May 20, 2003 Issued
Array ( [id] => 7277556 [patent_doc_number] => 20040237007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-25 [patent_title] => 'Vector monitor, related method of controlling a transmitter and transmitter employing the same' [patent_app_type] => new [patent_app_number] => 10/442623 [patent_app_country] => US [patent_app_date] => 2003-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5134 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20040237007.pdf [firstpage_image] =>[orig_patent_app_number] => 10442623 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/442623
Vector monitor, related method of controlling a transmitter and transmitter employing the same May 20, 2003 Issued
Array ( [id] => 739876 [patent_doc_number] => 07039842 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-05-02 [patent_title] => 'Measuring propagation delays of programmable logic devices' [patent_app_type] => utility [patent_app_number] => 10/441814 [patent_app_country] => US [patent_app_date] => 2003-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 4463 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/039/07039842.pdf [firstpage_image] =>[orig_patent_app_number] => 10441814 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/441814
Measuring propagation delays of programmable logic devices May 18, 2003 Issued
Array ( [id] => 7277560 [patent_doc_number] => 20040237011 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-25 [patent_title] => 'Apparatus and method for saving precise system state following exceptions' [patent_app_type] => new [patent_app_number] => 10/440890 [patent_app_country] => US [patent_app_date] => 2003-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2018 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20040237011.pdf [firstpage_image] =>[orig_patent_app_number] => 10440890 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/440890
Apparatus and method for saving precise system state following exceptions May 18, 2003 Issued
Array ( [id] => 7443811 [patent_doc_number] => 20040210806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-21 [patent_title] => 'Flexible and extensible implementation of sharing test pins in ASIC' [patent_app_type] => new [patent_app_number] => 10/441000 [patent_app_country] => US [patent_app_date] => 2003-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2385 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20040210806.pdf [firstpage_image] =>[orig_patent_app_number] => 10441000 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/441000
Flexible and extensible implementation of sharing test pins in ASIC May 18, 2003 Issued
Array ( [id] => 582776 [patent_doc_number] => 07159161 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-02 [patent_title] => 'Test method and architecture for circuits having inputs' [patent_app_type] => utility [patent_app_number] => 10/441691 [patent_app_country] => US [patent_app_date] => 2003-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6265 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/159/07159161.pdf [firstpage_image] =>[orig_patent_app_number] => 10441691 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/441691
Test method and architecture for circuits having inputs May 18, 2003 Issued
Array ( [id] => 736365 [patent_doc_number] => 07043672 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-09 [patent_title] => 'Layout for a semiconductor memory device having redundant elements' [patent_app_type] => utility [patent_app_number] => 10/428151 [patent_app_country] => US [patent_app_date] => 2003-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9382 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/043/07043672.pdf [firstpage_image] =>[orig_patent_app_number] => 10428151 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/428151
Layout for a semiconductor memory device having redundant elements Apr 29, 2003 Issued
Array ( [id] => 6726401 [patent_doc_number] => 20030208713 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-06 [patent_title] => 'Test system rider board utilized for automated at-speed testing of high serial pin count multiple gigabit per second devices' [patent_app_type] => new [patent_app_number] => 10/411194 [patent_app_country] => US [patent_app_date] => 2003-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 10652 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0208/20030208713.pdf [firstpage_image] =>[orig_patent_app_number] => 10411194 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/411194
Test system rider board utilized for automated at-speed testing of high serial pin count multiple gigabit per second devices Apr 10, 2003 Issued
Array ( [id] => 6798548 [patent_doc_number] => 20030177423 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-18 [patent_title] => 'Tranmission device, reception device, test circuit, and test method' [patent_app_type] => new [patent_app_number] => 10/387132 [patent_app_country] => US [patent_app_date] => 2003-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11069 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0177/20030177423.pdf [firstpage_image] =>[orig_patent_app_number] => 10387132 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/387132
Transmission device, reception device, test circuit, and test method Mar 12, 2003 Issued
Array ( [id] => 7175045 [patent_doc_number] => 20040078672 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-22 [patent_title] => 'Internal bus testing device and method' [patent_app_type] => new [patent_app_number] => 10/385527 [patent_app_country] => US [patent_app_date] => 2003-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5872 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0078/20040078672.pdf [firstpage_image] =>[orig_patent_app_number] => 10385527 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/385527
Internal bus testing device and method Mar 11, 2003 Issued
Array ( [id] => 7608041 [patent_doc_number] => 07000159 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-14 [patent_title] => 'System and method for testing memory' [patent_app_type] => utility [patent_app_number] => 10/385228 [patent_app_country] => US [patent_app_date] => 2003-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 4511 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/000/07000159.pdf [firstpage_image] =>[orig_patent_app_number] => 10385228 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/385228
System and method for testing memory Mar 9, 2003 Issued
Array ( [id] => 702355 [patent_doc_number] => 07073104 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-07-04 [patent_title] => 'Method and system for applying testing voltage signal' [patent_app_type] => utility [patent_app_number] => 10/384856 [patent_app_country] => US [patent_app_date] => 2003-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2941 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/073/07073104.pdf [firstpage_image] =>[orig_patent_app_number] => 10384856 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/384856
Method and system for applying testing voltage signal Mar 9, 2003 Issued
Array ( [id] => 950192 [patent_doc_number] => 06964000 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-08 [patent_title] => 'Semiconductor integrated circuit device having a test circuit of a random access memory' [patent_app_type] => utility [patent_app_number] => 10/383553 [patent_app_country] => US [patent_app_date] => 2003-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 27 [patent_no_of_words] => 24981 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/964/06964000.pdf [firstpage_image] =>[orig_patent_app_number] => 10383553 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/383553
Semiconductor integrated circuit device having a test circuit of a random access memory Mar 9, 2003 Issued
Array ( [id] => 945891 [patent_doc_number] => 06968490 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-22 [patent_title] => 'Techniques for automatic eye-degradation testing of a high-speed serial receiver' [patent_app_type] => utility [patent_app_number] => 10/383501 [patent_app_country] => US [patent_app_date] => 2003-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5305 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/968/06968490.pdf [firstpage_image] =>[orig_patent_app_number] => 10383501 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/383501
Techniques for automatic eye-degradation testing of a high-speed serial receiver Mar 6, 2003 Issued
Array ( [id] => 7672046 [patent_doc_number] => 20040181733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-16 [patent_title] => 'Assisted memory system' [patent_app_type] => new [patent_app_number] => 10/384053 [patent_app_country] => US [patent_app_date] => 2003-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5655 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20040181733.pdf [firstpage_image] =>[orig_patent_app_number] => 10384053 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/384053
Assisted memory system Mar 5, 2003 Issued
Array ( [id] => 1181486 [patent_doc_number] => 06754860 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-22 [patent_title] => 'Method for creating defect management information in an recording medium, and apparatus and medium based on said method' [patent_app_type] => B2 [patent_app_number] => 10/371450 [patent_app_country] => US [patent_app_date] => 2003-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5385 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/754/06754860.pdf [firstpage_image] =>[orig_patent_app_number] => 10371450 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/371450
Method for creating defect management information in an recording medium, and apparatus and medium based on said method Feb 20, 2003 Issued
Array ( [id] => 1240971 [patent_doc_number] => 06691265 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-10 [patent_title] => 'Method for creating defect management information in an recording medium, and apparatus and medium based on said method' [patent_app_type] => B2 [patent_app_number] => 10/372183 [patent_app_country] => US [patent_app_date] => 2003-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5389 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/691/06691265.pdf [firstpage_image] =>[orig_patent_app_number] => 10372183 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/372183
Method for creating defect management information in an recording medium, and apparatus and medium based on said method Feb 20, 2003 Issued
Array ( [id] => 6763166 [patent_doc_number] => 20030126528 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'Method for creating defect management information in an recording medium, and apparatus and medium based on said method' [patent_app_type] => new [patent_app_number] => 10/371867 [patent_app_country] => US [patent_app_date] => 2003-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5436 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20030126528.pdf [firstpage_image] =>[orig_patent_app_number] => 10371867 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/371867
Method for creating defect management information in an recording medium, and apparatus and medium based on said method Feb 20, 2003 Issued
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