Search

Armand Melendez

Examiner (ID: 2768, Phone: (571)270-0342 , Office: P/1742 )

Most Active Art Unit
1742
Art Unit(s)
1742, 1759
Total Applications
481
Issued Applications
205
Pending Applications
93
Abandoned Applications
214

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1292395 [patent_doc_number] => 06643821 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-04 [patent_title] => 'Method and device for computing incremental checksums' [patent_app_type] => B2 [patent_app_number] => 09/726927 [patent_app_country] => US [patent_app_date] => 2000-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3433 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/643/06643821.pdf [firstpage_image] =>[orig_patent_app_number] => 09726927 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/726927
Method and device for computing incremental checksums Nov 29, 2000 Issued
Array ( [id] => 1462531 [patent_doc_number] => 06427218 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-07-30 [patent_title] => 'Method of generating test pattern for semiconductor integrated circuit and method of testing the same' [patent_app_type] => B2 [patent_app_number] => 09/725264 [patent_app_country] => US [patent_app_date] => 2000-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6900 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/427/06427218.pdf [firstpage_image] =>[orig_patent_app_number] => 09725264 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/725264
Method of generating test pattern for semiconductor integrated circuit and method of testing the same Nov 28, 2000 Issued
Array ( [id] => 1311771 [patent_doc_number] => 06625764 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-23 [patent_title] => 'Testing using test packets containing random data' [patent_app_type] => B1 [patent_app_number] => 09/723836 [patent_app_country] => US [patent_app_date] => 2000-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9370 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/625/06625764.pdf [firstpage_image] =>[orig_patent_app_number] => 09723836 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/723836
Testing using test packets containing random data Nov 27, 2000 Issued
Array ( [id] => 1314841 [patent_doc_number] => 06622269 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-16 [patent_title] => 'Memory fault isolation apparatus and methods' [patent_app_type] => B1 [patent_app_number] => 09/723010 [patent_app_country] => US [patent_app_date] => 2000-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4762 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/622/06622269.pdf [firstpage_image] =>[orig_patent_app_number] => 09723010 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/723010
Memory fault isolation apparatus and methods Nov 26, 2000 Issued
Array ( [id] => 1339977 [patent_doc_number] => 06601204 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-29 [patent_title] => 'Pattern generating method, pattern generator using the method, and memory tester using the pattern generator' [patent_app_type] => B1 [patent_app_number] => 09/717715 [patent_app_country] => US [patent_app_date] => 2000-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8195 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/601/06601204.pdf [firstpage_image] =>[orig_patent_app_number] => 09717715 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/717715
Pattern generating method, pattern generator using the method, and memory tester using the pattern generator Nov 20, 2000 Issued
Array ( [id] => 1324288 [patent_doc_number] => 06611931 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-26 [patent_title] => 'Check method of temporary storage circuit in electronic control unit' [patent_app_type] => B1 [patent_app_number] => 09/709717 [patent_app_country] => US [patent_app_date] => 2000-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9841 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/611/06611931.pdf [firstpage_image] =>[orig_patent_app_number] => 09709717 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/709717
Check method of temporary storage circuit in electronic control unit Nov 12, 2000 Issued
Array ( [id] => 1166933 [patent_doc_number] => 06772379 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-03 [patent_title] => 'Apparatus for verifying the data retention in non-volatile memories' [patent_app_type] => B1 [patent_app_number] => 09/710089 [patent_app_country] => US [patent_app_date] => 2000-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 2719 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/772/06772379.pdf [firstpage_image] =>[orig_patent_app_number] => 09710089 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/710089
Apparatus for verifying the data retention in non-volatile memories Nov 9, 2000 Issued
Array ( [id] => 1329406 [patent_doc_number] => 06606721 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-12 [patent_title] => 'Method and apparatus that tracks processor resources in a dynamic pseudo-random test program generator' [patent_app_type] => B1 [patent_app_number] => 09/709801 [patent_app_country] => US [patent_app_date] => 2000-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6882 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/606/06606721.pdf [firstpage_image] =>[orig_patent_app_number] => 09709801 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/709801
Method and apparatus that tracks processor resources in a dynamic pseudo-random test program generator Nov 9, 2000 Issued
Array ( [id] => 1210565 [patent_doc_number] => 06718513 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-06 [patent_title] => 'Fault monitoring system and fault reporting method' [patent_app_type] => B1 [patent_app_number] => 09/709215 [patent_app_country] => US [patent_app_date] => 2000-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 4529 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/718/06718513.pdf [firstpage_image] =>[orig_patent_app_number] => 09709215 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/709215
Fault monitoring system and fault reporting method Nov 8, 2000 Issued
Array ( [id] => 1289445 [patent_doc_number] => 06647520 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-11 [patent_title] => 'Semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/708064 [patent_app_country] => US [patent_app_date] => 2000-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 5839 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/647/06647520.pdf [firstpage_image] =>[orig_patent_app_number] => 09708064 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/708064
Semiconductor device Nov 7, 2000 Issued
Array ( [id] => 1258646 [patent_doc_number] => 06671847 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-30 [patent_title] => 'I/O device testing method and apparatus' [patent_app_type] => B1 [patent_app_number] => 09/709000 [patent_app_country] => US [patent_app_date] => 2000-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5171 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/671/06671847.pdf [firstpage_image] =>[orig_patent_app_number] => 09709000 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/709000
I/O device testing method and apparatus Nov 7, 2000 Issued
Array ( [id] => 7631512 [patent_doc_number] => 06665825 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-16 [patent_title] => 'Cellular CDMA transmission system' [patent_app_type] => B1 [patent_app_number] => 09/707145 [patent_app_country] => US [patent_app_date] => 2000-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4903 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/665/06665825.pdf [firstpage_image] =>[orig_patent_app_number] => 09707145 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/707145
Cellular CDMA transmission system Nov 5, 2000 Issued
Array ( [id] => 1234604 [patent_doc_number] => 06697993 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-24 [patent_title] => 'Transmission and reception methods and devices in a transmission system comprising convolutional interleaving/deinterleaving' [patent_app_type] => B1 [patent_app_number] => 09/706638 [patent_app_country] => US [patent_app_date] => 2000-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 2688 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/697/06697993.pdf [firstpage_image] =>[orig_patent_app_number] => 09706638 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/706638
Transmission and reception methods and devices in a transmission system comprising convolutional interleaving/deinterleaving Nov 5, 2000 Issued
Array ( [id] => 1201137 [patent_doc_number] => 06728918 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-27 [patent_title] => 'Relay transmission method and system, and device used thereof' [patent_app_type] => B1 [patent_app_number] => 09/699424 [patent_app_country] => US [patent_app_date] => 2000-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 18528 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/728/06728918.pdf [firstpage_image] =>[orig_patent_app_number] => 09699424 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/699424
Relay transmission method and system, and device used thereof Oct 30, 2000 Issued
Array ( [id] => 1513485 [patent_doc_number] => 06442727 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-27 [patent_title] => 'Method, circuit and apparatus for preserving and/or correcting product engineering information' [patent_app_type] => B1 [patent_app_number] => 09/703283 [patent_app_country] => US [patent_app_date] => 2000-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5389 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/442/06442727.pdf [firstpage_image] =>[orig_patent_app_number] => 09703283 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/703283
Method, circuit and apparatus for preserving and/or correcting product engineering information Oct 30, 2000 Issued
Array ( [id] => 1324353 [patent_doc_number] => 06611937 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-26 [patent_title] => 'Error correction on a mobile device' [patent_app_type] => B1 [patent_app_number] => 09/692121 [patent_app_country] => US [patent_app_date] => 2000-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 8143 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/611/06611937.pdf [firstpage_image] =>[orig_patent_app_number] => 09692121 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/692121
Error correction on a mobile device Oct 18, 2000 Issued
Array ( [id] => 1272113 [patent_doc_number] => 06662325 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-09 [patent_title] => 'Apparatus for on-line circuit debug using JTAG and shadow scan in a microprocessor' [patent_app_type] => B1 [patent_app_number] => 09/680238 [patent_app_country] => US [patent_app_date] => 2000-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5943 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 304 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/662/06662325.pdf [firstpage_image] =>[orig_patent_app_number] => 09680238 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/680238
Apparatus for on-line circuit debug using JTAG and shadow scan in a microprocessor Oct 4, 2000 Issued
Array ( [id] => 1144125 [patent_doc_number] => 06785854 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-31 [patent_title] => 'Test access port (TAP) controller system and method to debug internal intermediate scan test faults' [patent_app_type] => B1 [patent_app_number] => 09/678412 [patent_app_country] => US [patent_app_date] => 2000-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5367 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/785/06785854.pdf [firstpage_image] =>[orig_patent_app_number] => 09678412 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/678412
Test access port (TAP) controller system and method to debug internal intermediate scan test faults Oct 1, 2000 Issued
Array ( [id] => 1017342 [patent_doc_number] => 06895539 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-05-17 [patent_title] => 'Universal method and apparatus for controlling a functional test system' [patent_app_type] => utility [patent_app_number] => 09/675732 [patent_app_country] => US [patent_app_date] => 2000-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 12106 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/895/06895539.pdf [firstpage_image] =>[orig_patent_app_number] => 09675732 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/675732
Universal method and apparatus for controlling a functional test system Sep 28, 2000 Issued
Array ( [id] => 1572594 [patent_doc_number] => 06378097 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-23 [patent_title] => 'System and method for testing a microprocessor with an onboard test vector generator' [patent_app_type] => B1 [patent_app_number] => 09/672536 [patent_app_country] => US [patent_app_date] => 2000-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4414 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/378/06378097.pdf [firstpage_image] =>[orig_patent_app_number] => 09672536 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/672536
System and method for testing a microprocessor with an onboard test vector generator Sep 27, 2000 Issued
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