Search

Arun C. Williams

Examiner (ID: 12138, Phone: (571)272-9765 , Office: P/2859 )

Most Active Art Unit
2859
Art Unit(s)
2838, 2858, 2859, 2112
Total Applications
1838
Issued Applications
1467
Pending Applications
90
Abandoned Applications
305

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12262399 [patent_doc_number] => 20180081596 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-22 [patent_title] => 'DATA PROCESSING APPARATUS AND DATA PROCESSING METHOD' [patent_app_type] => utility [patent_app_number] => 15/443133 [patent_app_country] => US [patent_app_date] => 2017-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5410 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15443133 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/443133
DATA PROCESSING APPARATUS AND DATA PROCESSING METHOD Feb 26, 2017 Abandoned
Array ( [id] => 12796735 [patent_doc_number] => 20180157414 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-07 [patent_title] => STORAGE DEVICE AND CONTROL METHOD OF THE SAME [patent_app_type] => utility [patent_app_number] => 15/443850 [patent_app_country] => US [patent_app_date] => 2017-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10139 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 296 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15443850 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/443850
Storage device and control method of the same Feb 26, 2017 Issued
Array ( [id] => 13390231 [patent_doc_number] => 20180246658 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-30 [patent_title] => PROCESSING A WRITE OF RECORDS TO MAINTAIN ATOMICITY FOR WRITING A DEFINED GROUP OF RECORDS TO MULTIPLE TRACKS [patent_app_type] => utility [patent_app_number] => 15/444078 [patent_app_country] => US [patent_app_date] => 2017-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7533 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15444078 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/444078
Processing a write of records to maintain atomicity for writing a defined group of records to multiple tracks Feb 26, 2017 Issued
Array ( [id] => 16478052 [patent_doc_number] => 10852998 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-01 [patent_title] => Sub-cluster recovery using a partition group index [patent_app_type] => utility [patent_app_number] => 15/443721 [patent_app_country] => US [patent_app_date] => 2017-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4053 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15443721 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/443721
Sub-cluster recovery using a partition group index Feb 26, 2017 Issued
Array ( [id] => 15167711 [patent_doc_number] => 10489350 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-26 [patent_title] => Data compression with inline compression metadata [patent_app_type] => utility [patent_app_number] => 15/442511 [patent_app_country] => US [patent_app_date] => 2017-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4883 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15442511 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/442511
Data compression with inline compression metadata Feb 23, 2017 Issued
Array ( [id] => 12262618 [patent_doc_number] => 20180081814 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-22 [patent_title] => 'QUALITY OF CACHE MANAGEMENT IN A COMPUTER' [patent_app_type] => utility [patent_app_number] => 15/440109 [patent_app_country] => US [patent_app_date] => 2017-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7373 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15440109 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/440109
QUALITY OF CACHE MANAGEMENT IN A COMPUTER Feb 22, 2017 Abandoned
Array ( [id] => 11651386 [patent_doc_number] => 20170147287 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-25 [patent_title] => 'Matrix Ordering for Cache Efficiency in Performing Large Sparse Matrix Operations' [patent_app_type] => utility [patent_app_number] => 15/424955 [patent_app_country] => US [patent_app_date] => 2017-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 17692 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15424955 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/424955
Matrix ordering for cache efficiency in performing large sparse matrix operations Feb 5, 2017 Issued
Array ( [id] => 11651548 [patent_doc_number] => 20170147449 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-25 [patent_title] => 'PROVIDING ACCESS TO STORED COMPUTING SNAPSHOTS' [patent_app_type] => utility [patent_app_number] => 15/424574 [patent_app_country] => US [patent_app_date] => 2017-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 24900 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15424574 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/424574
Providing access to stored computing snapshots Feb 2, 2017 Issued
Array ( [id] => 12213817 [patent_doc_number] => 09910624 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-06 [patent_title] => 'Data writing in a file system' [patent_app_type] => utility [patent_app_number] => 15/415092 [patent_app_country] => US [patent_app_date] => 2017-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 5003 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 591 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15415092 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/415092
Data writing in a file system Jan 24, 2017 Issued
Array ( [id] => 12819598 [patent_doc_number] => 20180165038 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-14 [patent_title] => TECHNIQUES FOR STORAGE COMMAND PROCESSING [patent_app_type] => utility [patent_app_number] => 15/376835 [patent_app_country] => US [patent_app_date] => 2016-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11690 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15376835 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/376835
Techniques for storage command processing Dec 12, 2016 Issued
Array ( [id] => 11708988 [patent_doc_number] => 20170177487 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-22 [patent_title] => 'DETERMINISTIC OPERATION OF STORAGE CLASS MEMORY' [patent_app_type] => utility [patent_app_number] => 15/376507 [patent_app_country] => US [patent_app_date] => 2016-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5010 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15376507 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/376507
Deterministic operation of storage class memory Dec 11, 2016 Issued
Array ( [id] => 14009677 [patent_doc_number] => 10223298 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-05 [patent_title] => Urgency based reordering for priority order servicing of memory requests [patent_app_type] => utility [patent_app_number] => 15/376442 [patent_app_country] => US [patent_app_date] => 2016-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 28 [patent_no_of_words] => 19642 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15376442 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/376442
Urgency based reordering for priority order servicing of memory requests Dec 11, 2016 Issued
Array ( [id] => 12820081 [patent_doc_number] => 20180165199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-14 [patent_title] => APPARATUSES AND METHODS FOR A PROCESSOR ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 15/376647 [patent_app_country] => US [patent_app_date] => 2016-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 60530 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15376647 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/376647
Zeroing a cache line Dec 11, 2016 Issued
Array ( [id] => 16462882 [patent_doc_number] => 10846230 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-24 [patent_title] => Methods and systems for invalidating memory ranges in fabric-based architectures [patent_app_type] => utility [patent_app_number] => 15/376447 [patent_app_country] => US [patent_app_date] => 2016-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 26 [patent_no_of_words] => 17138 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15376447 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/376447
Methods and systems for invalidating memory ranges in fabric-based architectures Dec 11, 2016 Issued
Array ( [id] => 11501646 [patent_doc_number] => 20170075831 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-16 [patent_title] => 'CONFIGURABLE MEMORY CIRCUIT SYSTEM AND METHOD' [patent_app_type] => utility [patent_app_number] => 15/358335 [patent_app_country] => US [patent_app_date] => 2016-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 28739 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15358335 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/358335
Configurable memory circuit system and method Nov 21, 2016 Issued
Array ( [id] => 11473675 [patent_doc_number] => 20170060458 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-02 [patent_title] => 'METHODS AND SYSTEM OF POOLING SECONDARY STORAGE DEVICES' [patent_app_type] => utility [patent_app_number] => 15/353546 [patent_app_country] => US [patent_app_date] => 2016-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10570 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15353546 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/353546
Methods and system of pooling secondary storage devices Nov 15, 2016 Issued
Array ( [id] => 11621765 [patent_doc_number] => 20170131952 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-11 [patent_title] => 'Block Storage Using a Hybrid Memory Device' [patent_app_type] => utility [patent_app_number] => 15/340506 [patent_app_country] => US [patent_app_date] => 2016-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7766 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15340506 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/340506
Block storage using a hybrid memory device Oct 31, 2016 Issued
Array ( [id] => 12262610 [patent_doc_number] => 20180081805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-22 [patent_title] => 'SYSTEM AND METHOD FOR IMPLEMENTING AN EFFICIENT LARGE SYSTEM PAGE INVALIDATION' [patent_app_type] => utility [patent_app_number] => 15/272757 [patent_app_country] => US [patent_app_date] => 2016-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 13800 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15272757 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/272757
System and method for implementing an efficient large system page invalidation Sep 21, 2016 Issued
Array ( [id] => 12140050 [patent_doc_number] => 20180018133 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-18 [patent_title] => 'MEMORY CONTROLLER ARBITER WITH STREAK AND READ/WRITE TRANSACTION MANAGEMENT' [patent_app_type] => utility [patent_app_number] => 15/272626 [patent_app_country] => US [patent_app_date] => 2016-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7595 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15272626 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/272626
Memory controller arbiter with streak and read/write transaction management Sep 21, 2016 Issued
Array ( [id] => 15167603 [patent_doc_number] => 10489296 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-26 [patent_title] => Quality of cache management in a computer [patent_app_type] => utility [patent_app_number] => 15/272459 [patent_app_country] => US [patent_app_date] => 2016-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7105 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15272459 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/272459
Quality of cache management in a computer Sep 21, 2016 Issued
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