Search

Arvind Talukdar

Examiner (ID: 14536, Phone: (571)270-3177 , Office: P/2132 )

Most Active Art Unit
2132
Art Unit(s)
2132, 2182, 2189
Total Applications
650
Issued Applications
505
Pending Applications
67
Abandoned Applications
109

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17605774 [patent_doc_number] => 11334262 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-17 [patent_title] => On-chip atomic transaction engine [patent_app_type] => utility [patent_app_number] => 16/945521 [patent_app_country] => US [patent_app_date] => 2020-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 17559 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16945521 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/945521
On-chip atomic transaction engine Jul 30, 2020 Issued
Array ( [id] => 18577665 [patent_doc_number] => 11734197 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-22 [patent_title] => Methods and systems for resilient encryption of data in memory [patent_app_type] => utility [patent_app_number] => 16/944892 [patent_app_country] => US [patent_app_date] => 2020-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 10884 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16944892 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/944892
Methods and systems for resilient encryption of data in memory Jul 30, 2020 Issued
Array ( [id] => 18248019 [patent_doc_number] => 11604604 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-03-14 [patent_title] => Efficient FTL implementation with compression [patent_app_type] => utility [patent_app_number] => 16/942659 [patent_app_country] => US [patent_app_date] => 2020-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 8544 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16942659 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/942659
Efficient FTL implementation with compression Jul 28, 2020 Issued
Array ( [id] => 16363162 [patent_doc_number] => 20200319913 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-08 [patent_title] => SYSTEM, APPARATUS AND METHOD FOR ACCESSING MULTIPLE ADDRESS SPACES VIA A VIRTUALIZATION DEVICE [patent_app_type] => utility [patent_app_number] => 16/909068 [patent_app_country] => US [patent_app_date] => 2020-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9377 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16909068 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/909068
SYSTEM, APPARATUS AND METHOD FOR ACCESSING MULTIPLE ADDRESS SPACES VIA A VIRTUALIZATION DEVICE Jun 22, 2020 Abandoned
Array ( [id] => 16346340 [patent_doc_number] => 20200310991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => STORAGE DEVICE HAVING A WIRELESS COMMUNICATION FUNCTION [patent_app_type] => utility [patent_app_number] => 16/901983 [patent_app_country] => US [patent_app_date] => 2020-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 30624 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16901983 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/901983
Storage device having a wireless communication function Jun 14, 2020 Issued
Array ( [id] => 18547032 [patent_doc_number] => 11720384 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-08 [patent_title] => Program code protection in a data processing system [patent_app_type] => utility [patent_app_number] => 16/893628 [patent_app_country] => US [patent_app_date] => 2020-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6385 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16893628 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/893628
Program code protection in a data processing system Jun 4, 2020 Issued
Array ( [id] => 16299829 [patent_doc_number] => 20200285552 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-10 [patent_title] => MEMORY SYSTEM USING SRAM WITH FLAG INFORMATION TO IDENTIFY UNMAPPED ADDRESSES [patent_app_type] => utility [patent_app_number] => 16/884240 [patent_app_country] => US [patent_app_date] => 2020-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7057 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16884240 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/884240
Memory system using SRAM with flag information to identify unmapped addresses May 26, 2020 Issued
Array ( [id] => 18330798 [patent_doc_number] => 11636040 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-25 [patent_title] => Methods and apparatus for inflight data forwarding and invalidation of pending writes in store queue [patent_app_type] => utility [patent_app_number] => 16/882252 [patent_app_country] => US [patent_app_date] => 2020-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 54 [patent_no_of_words] => 95359 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16882252 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/882252
Methods and apparatus for inflight data forwarding and invalidation of pending writes in store queue May 21, 2020 Issued
Array ( [id] => 17542663 [patent_doc_number] => 11307784 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-19 [patent_title] => Method and apparatus for storing memory attributes [patent_app_type] => utility [patent_app_number] => 16/882081 [patent_app_country] => US [patent_app_date] => 2020-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6306 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16882081 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/882081
Method and apparatus for storing memory attributes May 21, 2020 Issued
Array ( [id] => 17454694 [patent_doc_number] => 11269553 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-08 [patent_title] => Adjusting scan event thresholds to mitigate memory errors [patent_app_type] => utility [patent_app_number] => 16/878304 [patent_app_country] => US [patent_app_date] => 2020-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9025 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16878304 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/878304
Adjusting scan event thresholds to mitigate memory errors May 18, 2020 Issued
Array ( [id] => 18087385 [patent_doc_number] => 11537521 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-27 [patent_title] => Non-volatile dual inline memory module (NVDIMM) for supporting dram cache mode and operation method of NVDIMM [patent_app_type] => utility [patent_app_number] => 16/876890 [patent_app_country] => US [patent_app_date] => 2020-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 17853 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16876890 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/876890
Non-volatile dual inline memory module (NVDIMM) for supporting dram cache mode and operation method of NVDIMM May 17, 2020 Issued
Array ( [id] => 17230599 [patent_doc_number] => 20210357156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => DEFINING AND ACCESSING DYNAMIC REGISTERS IN A VIRTUAL PROCESSOR SYSTEM [patent_app_type] => utility [patent_app_number] => 16/874975 [patent_app_country] => US [patent_app_date] => 2020-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4760 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16874975 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/874975
DEFINING AND ACCESSING DYNAMIC REGISTERS IN A VIRTUAL PROCESSOR SYSTEM May 14, 2020 Abandoned
Array ( [id] => 16270855 [patent_doc_number] => 20200272342 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-27 [patent_title] => CONTROL METHOD, INFORMATION PROCESSING DEVICE, MANAGEMENT SYSTEM, AND RECORDING MEDIUM [patent_app_type] => utility [patent_app_number] => 16/871604 [patent_app_country] => US [patent_app_date] => 2020-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7288 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16871604 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/871604
Control method, information processing device, management system, and recording medium May 10, 2020 Issued
Array ( [id] => 17202178 [patent_doc_number] => 20210342273 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => MAPPING VIRTUAL BLOCK ADDRESSES TO PORTIONS OF A LOGICAL ADDRESS SPACE THAT POINT TO THE VIRTUAL BLOCK ADDRESSES [patent_app_type] => utility [patent_app_number] => 16/862735 [patent_app_country] => US [patent_app_date] => 2020-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12606 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16862735 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/862735
Mapping virtual block addresses to portions of a logical address space that point to the virtual block addresses Apr 29, 2020 Issued
Array ( [id] => 17187328 [patent_doc_number] => 20210334213 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => Remap Address Space Controller [patent_app_type] => utility [patent_app_number] => 16/856210 [patent_app_country] => US [patent_app_date] => 2020-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6324 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16856210 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/856210
Remap address space controller Apr 22, 2020 Issued
Array ( [id] => 17128698 [patent_doc_number] => 20210303467 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => APPARATUSES, METHODS, AND SYSTEMS FOR DYNAMIC BYPASSING OF LAST LEVEL CACHE [patent_app_type] => utility [patent_app_number] => 16/833304 [patent_app_country] => US [patent_app_date] => 2020-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17093 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16833304 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/833304
Apparatuses, methods, and systems for dynamic bypassing of last level cache Mar 26, 2020 Issued
Array ( [id] => 17098941 [patent_doc_number] => 20210286732 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-16 [patent_title] => MULTI-WAY CACHE MEMORY ACCESS [patent_app_type] => utility [patent_app_number] => 16/817609 [patent_app_country] => US [patent_app_date] => 2020-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4373 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16817609 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/817609
Multi-way cache memory access Mar 12, 2020 Issued
Array ( [id] => 16271014 [patent_doc_number] => 20200272502 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-27 [patent_title] => STORAGE ARCHITECTURE FOR VIRTUAL MACHINES [patent_app_type] => utility [patent_app_number] => 16/816977 [patent_app_country] => US [patent_app_date] => 2020-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14872 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16816977 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/816977
Storage architecture for virtual machines Mar 11, 2020 Issued
Array ( [id] => 19426653 [patent_doc_number] => 12086072 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-09-10 [patent_title] => Memory vulnerability mitigation [patent_app_type] => utility [patent_app_number] => 16/816044 [patent_app_country] => US [patent_app_date] => 2020-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 11230 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16816044 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/816044
Memory vulnerability mitigation Mar 10, 2020 Issued
Array ( [id] => 16017691 [patent_doc_number] => 20200183689 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-11 [patent_title] => HANDLING EFFECTIVE ADDRESS SYNONYMS IN A LOAD-STORE UNIT THAT OPERATES WITHOUT ADDRESS TRANSLATION [patent_app_type] => utility [patent_app_number] => 16/793835 [patent_app_country] => US [patent_app_date] => 2020-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16867 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16793835 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/793835
Handling effective address synonyms in a load-store unit that operates without address translation Feb 17, 2020 Issued
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