
Ashokkumar B Patel
Supervisory Patent Examiner (ID: 3931, Phone: (571)272-3972 , Office: P/2491 )
Most Active Art Unit | 2154 |
Art Unit(s) | 2154, 2456, 2491, 2449 |
Total Applications | 276 |
Issued Applications | 121 |
Pending Applications | 21 |
Abandoned Applications | 133 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 6927062
[patent_doc_number] => 20050240319
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-27
[patent_title] => 'Vehicle control information transmission structure, vehicle control device using the transmission structure, and vehicle control simulator using the transmission structure'
[patent_app_type] => utility
[patent_app_number] => 10/515382
[patent_app_country] => US
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[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0240/20050240319.pdf
[firstpage_image] =>[orig_patent_app_number] => 10515382
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/515382 | Vehicle control information conveyance structure, vehicle control device using the conveyance structure, and vehicle control simulator using the conveyance structure | Jun 18, 2003 | Issued |
Array
(
[id] => 6822617
[patent_doc_number] => 20030220778
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-11-27
[patent_title] => 'Method and apparatus for electronically simulating jaw function within electronic model images'
[patent_app_type] => new
[patent_app_number] => 10/426253
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/426253 | Method and apparatus for electronically simulating jaw function within electronic model images | Apr 28, 2003 | Abandoned |
Array
(
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[patent_doc_number] => 07716036
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[patent_kind] => B2
[patent_issue_date] => 2010-05-11
[patent_title] => 'Method and apparatus to use clock bursting to minimize command latency in a logic simulation hardware emulator / accelerator'
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[patent_app_number] => 10/422189
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/422189 | Method and apparatus to use clock bursting to minimize command latency in a logic simulation hardware emulator / accelerator | Apr 23, 2003 | Issued |
Array
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[patent_issue_date] => 2004-02-26
[patent_title] => 'Apparatus and method for vehicle simulation'
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[patent_app_number] => 10/418297
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[patent_title] => 'Method and apparatus for accelerated post-silicon testing and random number generation'
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Array
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[patent_title] => 'Method, apparatus and system for pore pressure prediction in presence of dipping formations'
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Array
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[patent_title] => 'Single edge-triggered flip-flop design with asynchronous programmable reset'
[patent_app_type] => new
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/390314 | Single edge-triggered flip-flop design with asynchronous programmable reset | Mar 16, 2003 | Abandoned |
Array
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[patent_title] => 'Variable altitude simulator system for testing engines and vehicles'
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[patent_app_number] => 10/389870
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Array
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[patent_title] => 'Coupled quadrilateral grid level set scheme for piezoelectric ink-jet simulation'
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Array
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[patent_title] => 'Method of designing partially composite concrete sandwich panels and such panels'
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[patent_app_number] => 10/389165
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Array
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[patent_title] => 'Method for determining the physicochemical properties of a three-dimensional body'
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Array
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