Search

Asok K. Sarkar

Examiner (ID: 13120, Phone: (571)272-1970 , Office: P/2891 )

Most Active Art Unit
2891
Art Unit(s)
2829, 2891, 2813
Total Applications
2296
Issued Applications
1995
Pending Applications
119
Abandoned Applications
207

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18533162 [patent_doc_number] => 20230238238 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-27 [patent_title] => ADVANCED SELF ALIGNED MULTIPLE PATTERNING USING TIN OXIDE [patent_app_type] => utility [patent_app_number] => 18/002627 [patent_app_country] => US [patent_app_date] => 2021-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18673 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18002627 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/002627
ADVANCED SELF ALIGNED MULTIPLE PATTERNING USING TIN OXIDE Jul 20, 2021 Pending
Array ( [id] => 20551542 [patent_doc_number] => 12562340 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-24 [patent_title] => Film forming method and film forming apparatus [patent_app_type] => utility [patent_app_number] => 18/007318 [patent_app_country] => US [patent_app_date] => 2021-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 2328 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18007318 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/007318
Film forming method and film forming apparatus Jul 19, 2021 Issued
Array ( [id] => 17203429 [patent_doc_number] => 20210343524 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => METHOD OF FORMING OXIDE FILM INCLUDING TWO NON-OXYGEN ELEMENTS, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, METHOD OF FORMING DIELECTRIC FILM, AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/376403 [patent_app_country] => US [patent_app_date] => 2021-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13157 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17376403 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/376403
Method of forming oxide film including two non-oxygen elements, method of manufacturing semiconductor device, method of forming dielectric film, and semiconductor device Jul 14, 2021 Issued
Array ( [id] => 17203489 [patent_doc_number] => 20210343584 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/375500 [patent_app_country] => US [patent_app_date] => 2021-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4641 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17375500 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/375500
Semiconductor device manufacturing method and semiconductor device Jul 13, 2021 Issued
Array ( [id] => 18631728 [patent_doc_number] => 20230290633 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-14 [patent_title] => METHOD FOR PRODUCING A DIELECTRIC LAYER ON A STRUCTURE MADE OF MATERIALS III-V [patent_app_type] => utility [patent_app_number] => 18/004362 [patent_app_country] => US [patent_app_date] => 2021-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9529 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18004362 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/004362
METHOD FOR PRODUCING A DIELECTRIC LAYER ON A STRUCTURE MADE OF MATERIALS III-V Jul 7, 2021 Pending
Array ( [id] => 19229561 [patent_doc_number] => 12009204 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-11 [patent_title] => Bias temperature instability of SiO [patent_app_type] => utility [patent_app_number] => 17/369709 [patent_app_country] => US [patent_app_date] => 2021-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 32 [patent_no_of_words] => 9640 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17369709 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/369709
Bias temperature instability of SiO Jul 6, 2021 Issued
Array ( [id] => 17189159 [patent_doc_number] => 20210336044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/367647 [patent_app_country] => US [patent_app_date] => 2021-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2897 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17367647 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/367647
High electron mobility transistor and method for fabricating the same Jul 5, 2021 Issued
Array ( [id] => 18661277 [patent_doc_number] => 20230307290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => REDUCING INTRALEVEL CAPACITANCE IN SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/003145 [patent_app_country] => US [patent_app_date] => 2021-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11336 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18003145 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/003145
Reducing intralevel capacitance in semiconductor devices Jun 27, 2021 Issued
Array ( [id] => 17318745 [patent_doc_number] => 20210407795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => METHODS OF FORMING MATERIAL LAYER, SEMICONDUCTOR DEVICES, AND METHODS OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/358089 [patent_app_country] => US [patent_app_date] => 2021-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13152 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17358089 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/358089
Methods of forming material layer, semiconductor devices, and methods of manufacturing the same Jun 24, 2021 Issued
Array ( [id] => 18514615 [patent_doc_number] => 20230230874 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-20 [patent_title] => METHOD FOR TRANSFERRING A THIN LAYER ONTO A SUPPORT SUBSTRATE PROVIDED WITH A CHARGE-TRAPPING LAYER [patent_app_type] => utility [patent_app_number] => 18/007145 [patent_app_country] => US [patent_app_date] => 2021-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6204 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18007145 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/007145
Method for transferring a thin layer onto a support substrate provided with a charge-trapping layer Jun 22, 2021 Issued
Array ( [id] => 19414711 [patent_doc_number] => 12080547 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-03 [patent_title] => Interconnect system with improved low-K dielectrics [patent_app_type] => utility [patent_app_number] => 17/350792 [patent_app_country] => US [patent_app_date] => 2021-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 9476 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17350792 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/350792
Interconnect system with improved low-K dielectrics Jun 16, 2021 Issued
Array ( [id] => 18593487 [patent_doc_number] => 11742399 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-29 [patent_title] => Topology selective and sacrificial silicon nitride layer for generating spacers for a semiconductor device drain [patent_app_type] => utility [patent_app_number] => 17/304214 [patent_app_country] => US [patent_app_date] => 2021-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8700 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17304214 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/304214
Topology selective and sacrificial silicon nitride layer for generating spacers for a semiconductor device drain Jun 15, 2021 Issued
Array ( [id] => 18357795 [patent_doc_number] => 11646201 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-05-09 [patent_title] => Method for fabrication of orientation-patterned templates on common substrates [patent_app_type] => utility [patent_app_number] => 17/346642 [patent_app_country] => US [patent_app_date] => 2021-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 37 [patent_no_of_words] => 15066 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17346642 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/346642
Method for fabrication of orientation-patterned templates on common substrates Jun 13, 2021 Issued
Array ( [id] => 19330548 [patent_doc_number] => 12048251 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-23 [patent_title] => Magnetoresistance effect element [patent_app_type] => utility [patent_app_number] => 17/345084 [patent_app_country] => US [patent_app_date] => 2021-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 8437 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17345084 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/345084
Magnetoresistance effect element Jun 10, 2021 Issued
Array ( [id] => 17477306 [patent_doc_number] => 20220084810 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => MANUFACTURING METHOD FOR SILICON NITRIDE THIN FILM, THIN FILM TRANSISTOR AND DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 17/344995 [patent_app_country] => US [patent_app_date] => 2021-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4056 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17344995 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/344995
Manufacturing method for silicon nitride thin film, thin film transistor and display panel Jun 10, 2021 Issued
Array ( [id] => 17417005 [patent_doc_number] => 20220051909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-17 [patent_title] => METHOD OF MANUFACTURING AN ELECTRONIC DEVICE AND ELECTRONIC DEVICE MANUFACTURED THEREBY [patent_app_type] => utility [patent_app_number] => 17/340776 [patent_app_country] => US [patent_app_date] => 2021-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6833 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17340776 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/340776
Method of manufacturing an electronic device and electronic device manufactured thereby Jun 6, 2021 Issued
Array ( [id] => 18782134 [patent_doc_number] => 11823900 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-21 [patent_title] => Method for printing wide bandgap semiconductor materials [patent_app_type] => utility [patent_app_number] => 17/338997 [patent_app_country] => US [patent_app_date] => 2021-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 8929 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17338997 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/338997
Method for printing wide bandgap semiconductor materials Jun 3, 2021 Issued
Array ( [id] => 17100164 [patent_doc_number] => 20210287955 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-16 [patent_title] => NITROGEN-RICH SILICON NITRIDE FILMS FOR THIN FILM TRANSISTORS [patent_app_type] => utility [patent_app_number] => 17/338239 [patent_app_country] => US [patent_app_date] => 2021-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12502 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17338239 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/338239
Nitrogen-rich silicon nitride films for thin film transistors Jun 2, 2021 Issued
Array ( [id] => 19294494 [patent_doc_number] => 12033857 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-09 [patent_title] => Processing method for semiconductor surface defects and preparation method for semiconductor devices [patent_app_type] => utility [patent_app_number] => 17/599473 [patent_app_country] => US [patent_app_date] => 2021-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 4593 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17599473 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/599473
Processing method for semiconductor surface defects and preparation method for semiconductor devices May 30, 2021 Issued
Array ( [id] => 19288078 [patent_doc_number] => 20240224561 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => LIGHT-EMITTING ELEMENT, QUANTUM DOT SOLUTION, AND METHOD FOR MANUFACTURING LIGHT-EMITTING ELEMENT [patent_app_type] => utility [patent_app_number] => 18/287538 [patent_app_country] => US [patent_app_date] => 2021-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3622 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18287538 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/287538
LIGHT-EMITTING ELEMENT, QUANTUM DOT SOLUTION, AND METHOD FOR MANUFACTURING LIGHT-EMITTING ELEMENT May 19, 2021 Pending
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