Search

Asok K. Sarkar

Examiner (ID: 13120, Phone: (571)272-1970 , Office: P/2891 )

Most Active Art Unit
2891
Art Unit(s)
2829, 2891, 2813
Total Applications
2296
Issued Applications
1995
Pending Applications
119
Abandoned Applications
207

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16372394 [patent_doc_number] => 10804160 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-13 [patent_title] => Semiconductor device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/507529 [patent_app_country] => US [patent_app_date] => 2019-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 5823 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16507529 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/507529
Semiconductor device and method of manufacturing the same Jul 9, 2019 Issued
Array ( [id] => 16528750 [patent_doc_number] => 20200402831 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => TRANSFER SUBSTRATE UTILIZING SELECTABLE SURFACE ADHESION TRANSFER ELEMENTS [patent_app_type] => utility [patent_app_number] => 16/449844 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4888 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16449844 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/449844
Transfer substrate utilizing selectable surface adhesion transfer elements Jun 23, 2019 Issued
Array ( [id] => 16684376 [patent_doc_number] => 10943867 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-09 [patent_title] => Schemes for forming barrier layers for copper in interconnect structures [patent_app_type] => utility [patent_app_number] => 16/450788 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 5536 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16450788 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/450788
Schemes for forming barrier layers for copper in interconnect structures Jun 23, 2019 Issued
Array ( [id] => 16911324 [patent_doc_number] => 11043373 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-22 [patent_title] => Interconnect system with improved low-k dielectrics [patent_app_type] => utility [patent_app_number] => 16/449160 [patent_app_country] => US [patent_app_date] => 2019-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 9461 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16449160 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/449160
Interconnect system with improved low-k dielectrics Jun 20, 2019 Issued
Array ( [id] => 16789165 [patent_doc_number] => 10991604 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-27 [patent_title] => Method of manufacturing semiconductor structure [patent_app_type] => utility [patent_app_number] => 16/448888 [patent_app_country] => US [patent_app_date] => 2019-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 5966 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16448888 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/448888
Method of manufacturing semiconductor structure Jun 20, 2019 Issued
Array ( [id] => 15299923 [patent_doc_number] => 20190393097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => METHOD FOR FORMING A NANOWIRE DEVICE [patent_app_type] => utility [patent_app_number] => 16/449118 [patent_app_country] => US [patent_app_date] => 2019-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2991 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16449118 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/449118
Method for forming a nanowire device Jun 20, 2019 Issued
Array ( [id] => 15299903 [patent_doc_number] => 20190393087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => Tunneling Electrical Contacts [patent_app_type] => utility [patent_app_number] => 16/448160 [patent_app_country] => US [patent_app_date] => 2019-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5604 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16448160 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/448160
Tunneling electrical contacts Jun 20, 2019 Issued
Array ( [id] => 17018330 [patent_doc_number] => 11087975 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-08-10 [patent_title] => Method for fabrication of orientation-patterned templates on common substrates [patent_app_type] => utility [patent_app_number] => 16/447677 [patent_app_country] => US [patent_app_date] => 2019-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 37 [patent_no_of_words] => 15079 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16447677 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/447677
Method for fabrication of orientation-patterned templates on common substrates Jun 19, 2019 Issued
Array ( [id] => 16819917 [patent_doc_number] => 11004755 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Apparatus and method for the minimization of undercut during a UBM etch process [patent_app_type] => utility [patent_app_number] => 16/447723 [patent_app_country] => US [patent_app_date] => 2019-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 40 [patent_no_of_words] => 17617 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16447723 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/447723
Apparatus and method for the minimization of undercut during a UBM etch process Jun 19, 2019 Issued
Array ( [id] => 16820239 [patent_doc_number] => 11005081 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Coating method, display substrate and manufacturing method thereof, and display device [patent_app_type] => utility [patent_app_number] => 16/446722 [patent_app_country] => US [patent_app_date] => 2019-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6485 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16446722 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/446722
Coating method, display substrate and manufacturing method thereof, and display device Jun 19, 2019 Issued
Array ( [id] => 16402618 [patent_doc_number] => 20200343476 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-29 [patent_title] => OLED DISPLAY PANEL AND PREPARATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/492160 [patent_app_country] => US [patent_app_date] => 2019-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2765 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16492160 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/492160
OLED display panel and preparation method thereof Jun 18, 2019 Issued
Array ( [id] => 14875227 [patent_doc_number] => 20190287855 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => METHOD OF SEPARATING A BACK LAYER ON A SUBSTRATE USING EXPOSURE TO REDUCED TEMPERATURE AND RELATED APPARATUS [patent_app_type] => utility [patent_app_number] => 16/433717 [patent_app_country] => US [patent_app_date] => 2019-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6643 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16433717 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/433717
Method of separating a back layer on a substrate using exposure to reduced temperature and related apparatus Jun 5, 2019 Issued
Array ( [id] => 16502443 [patent_doc_number] => 10867837 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-15 [patent_title] => Methods of forming integrated circuitry [patent_app_type] => utility [patent_app_number] => 16/424104 [patent_app_country] => US [patent_app_date] => 2019-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 28 [patent_no_of_words] => 7770 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16424104 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/424104
Methods of forming integrated circuitry May 27, 2019 Issued
Array ( [id] => 16723738 [patent_doc_number] => 20210090885 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => METHOD FOR DIVIDING A BAR OF ONE OR MORE DEVICES [patent_app_type] => utility [patent_app_number] => 17/048383 [patent_app_country] => US [patent_app_date] => 2019-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15919 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17048383 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/048383
Method for dividing a bar of one or more devices May 16, 2019 Issued
Array ( [id] => 17018337 [patent_doc_number] => 11087982 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-10 [patent_title] => Method and system for fabricating a semiconductor device [patent_app_type] => utility [patent_app_number] => 16/620503 [patent_app_country] => US [patent_app_date] => 2019-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 10 [patent_no_of_words] => 3755 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16620503 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/620503
Method and system for fabricating a semiconductor device May 13, 2019 Issued
Array ( [id] => 15511123 [patent_doc_number] => 10562130 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-02-18 [patent_title] => Laser-assisted method for parting crystalline material [patent_app_type] => utility [patent_app_number] => 16/410487 [patent_app_country] => US [patent_app_date] => 2019-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 106 [patent_no_of_words] => 37164 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 310 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16410487 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/410487
Laser-assisted method for parting crystalline material May 12, 2019 Issued
Array ( [id] => 14753377 [patent_doc_number] => 20190259862 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => Integrated Circuits with Gate Stacks [patent_app_type] => utility [patent_app_number] => 16/404239 [patent_app_country] => US [patent_app_date] => 2019-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8840 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16404239 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/404239
Integrated circuits with gate stacks May 5, 2019 Issued
Array ( [id] => 16293484 [patent_doc_number] => 10770339 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-08 [patent_title] => Automated replacement of consumable parts using interfacing chambers [patent_app_type] => utility [patent_app_number] => 16/398107 [patent_app_country] => US [patent_app_date] => 2019-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 33 [patent_no_of_words] => 24057 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16398107 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/398107
Automated replacement of consumable parts using interfacing chambers Apr 28, 2019 Issued
Array ( [id] => 17452983 [patent_doc_number] => 11267828 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-08 [patent_title] => Silicon precursor and method of manufacturing silicon-containing thin film using the same [patent_app_type] => utility [patent_app_number] => 16/497973 [patent_app_country] => US [patent_app_date] => 2019-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 7828 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16497973 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/497973
Silicon precursor and method of manufacturing silicon-containing thin film using the same Apr 23, 2019 Issued
Array ( [id] => 14691503 [patent_doc_number] => 20190244867 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-08 [patent_title] => FINFET DEVICE [patent_app_type] => utility [patent_app_number] => 16/389597 [patent_app_country] => US [patent_app_date] => 2019-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6593 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16389597 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/389597
FinFET device Apr 18, 2019 Issued
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