Search

Asok K. Sarkar

Examiner (ID: 13120, Phone: (571)272-1970 , Office: P/2891 )

Most Active Art Unit
2891
Art Unit(s)
2829, 2891, 2813
Total Applications
2296
Issued Applications
1995
Pending Applications
119
Abandoned Applications
207

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18757744 [patent_doc_number] => 20230361207 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-09 [patent_title] => HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/223543 [patent_app_country] => US [patent_app_date] => 2023-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2917 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18223543 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/223543
High electron mobility transistor and method for fabricating the same Jul 17, 2023 Issued
Array ( [id] => 18757442 [patent_doc_number] => 20230360904 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-09 [patent_title] => METHOD OF PROCESSING SUBSTRATE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS, AND RECORDING MEDIUM [patent_app_type] => utility [patent_app_number] => 18/354238 [patent_app_country] => US [patent_app_date] => 2023-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12281 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18354238 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/354238
METHOD OF PROCESSING SUBSTRATE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS, AND RECORDING MEDIUM Jul 17, 2023 Pending
Array ( [id] => 19712562 [patent_doc_number] => 20250022704 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => DIRECTIONAL SELECTIVE FILL OF SILICON OXIDE MATERIALS [patent_app_type] => utility [patent_app_number] => 18/221240 [patent_app_country] => US [patent_app_date] => 2023-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8943 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18221240 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/221240
DIRECTIONAL SELECTIVE FILL OF SILICON OXIDE MATERIALS Jul 11, 2023 Pending
Array ( [id] => 18743361 [patent_doc_number] => 20230352349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => SYSTEMS AND METHODS FOR ANALYZING DEFECTS IN CVD FILMS [patent_app_type] => utility [patent_app_number] => 18/349930 [patent_app_country] => US [patent_app_date] => 2023-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8794 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18349930 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/349930
Systems and methods for analyzing defects in CVD films Jul 9, 2023 Issued
Array ( [id] => 20404381 [patent_doc_number] => 12494361 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-09 [patent_title] => Method for selective deposition of silicon nitride and structure including selectively-deposited silicon nitride layer [patent_app_type] => utility [patent_app_number] => 18/218726 [patent_app_country] => US [patent_app_date] => 2023-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1206 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18218726 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/218726
Method for selective deposition of silicon nitride and structure including selectively-deposited silicon nitride layer Jul 5, 2023 Issued
Array ( [id] => 18898548 [patent_doc_number] => 20240014033 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => METHOD OF DEPOSITING CONDENSABLE MATERIAL ONTO A SURFACE OF A SUBSTRATE [patent_app_type] => utility [patent_app_number] => 18/218221 [patent_app_country] => US [patent_app_date] => 2023-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5426 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18218221 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/218221
METHOD OF DEPOSITING CONDENSABLE MATERIAL ONTO A SURFACE OF A SUBSTRATE Jul 4, 2023 Pending
Array ( [id] => 18729284 [patent_doc_number] => 20230343580 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => METHOD OF PROCESSING SUBSTRATE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS, AND RECORDING MEDIUM [patent_app_type] => utility [patent_app_number] => 18/344181 [patent_app_country] => US [patent_app_date] => 2023-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9846 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18344181 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/344181
METHOD OF PROCESSING SUBSTRATE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS, AND RECORDING MEDIUM Jun 28, 2023 Pending
Array ( [id] => 19487234 [patent_doc_number] => 12106958 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-01 [patent_title] => Method of using dual frequency RF power in a process chamber [patent_app_type] => utility [patent_app_number] => 18/342296 [patent_app_country] => US [patent_app_date] => 2023-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4802 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18342296 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/342296
Method of using dual frequency RF power in a process chamber Jun 26, 2023 Issued
Array ( [id] => 19842838 [patent_doc_number] => 12255240 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-18 [patent_title] => Topology selective and sacrificial silicon nitride layer for generating spacers for a semiconductor device drain [patent_app_type] => utility [patent_app_number] => 18/342048 [patent_app_country] => US [patent_app_date] => 2023-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8727 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18342048 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/342048
Topology selective and sacrificial silicon nitride layer for generating spacers for a semiconductor device drain Jun 26, 2023 Issued
Array ( [id] => 19646429 [patent_doc_number] => 20240420949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => DOPED SILICON OXIDE FOR BOTTOM-UP DEPOSITION [patent_app_type] => utility [patent_app_number] => 18/210522 [patent_app_country] => US [patent_app_date] => 2023-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6651 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18210522 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/210522
DOPED SILICON OXIDE FOR BOTTOM-UP DEPOSITION Jun 14, 2023 Pending
Array ( [id] => 18844418 [patent_doc_number] => 20230406822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => SILICON COMPOUND AND METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE USING THE SAME [patent_app_type] => utility [patent_app_number] => 18/209583 [patent_app_country] => US [patent_app_date] => 2023-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7754 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18209583 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/209583
SILICON COMPOUND AND METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE USING THE SAME Jun 13, 2023 Pending
Array ( [id] => 18848743 [patent_doc_number] => 20230411147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => METHODS AND SYSTEMS FOR FORMING A LAYER COMPRISING SILICON OXIDE [patent_app_type] => utility [patent_app_number] => 18/334058 [patent_app_country] => US [patent_app_date] => 2023-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9353 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18334058 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/334058
METHODS AND SYSTEMS FOR FORMING A LAYER COMPRISING SILICON OXIDE Jun 12, 2023 Pending
Array ( [id] => 20229252 [patent_doc_number] => 12417907 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-16 [patent_title] => Method for increasing bridging process window of contact hole and gate of device [patent_app_type] => utility [patent_app_number] => 18/201453 [patent_app_country] => US [patent_app_date] => 2023-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 0 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18201453 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/201453
Method for increasing bridging process window of contact hole and gate of device May 23, 2023 Issued
Array ( [id] => 19589610 [patent_doc_number] => 20240387167 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => METHODS FOR FORMING LOW-K DIELECTRIC MATERIALS WITH INCREASED ETCH SELECTIVITY [patent_app_type] => utility [patent_app_number] => 18/197552 [patent_app_country] => US [patent_app_date] => 2023-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5564 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18197552 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/197552
METHODS FOR FORMING LOW-K DIELECTRIC MATERIALS WITH INCREASED ETCH SELECTIVITY May 14, 2023 Pending
Array ( [id] => 19575062 [patent_doc_number] => 20240379354 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-14 [patent_title] => System and Method for Semiconductor Structure [patent_app_type] => utility [patent_app_number] => 18/314885 [patent_app_country] => US [patent_app_date] => 2023-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8851 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18314885 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/314885
System and method for semiconductor structure May 9, 2023 Issued
Array ( [id] => 18600196 [patent_doc_number] => 20230274997 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => NITROGEN-RICH SILICON NITRIDE FILMS FOR THIN FILM TRANSISTORS [patent_app_type] => utility [patent_app_number] => 18/195196 [patent_app_country] => US [patent_app_date] => 2023-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12526 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18195196 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/195196
Nitrogen-rich silicon nitride films for thin film transistors May 8, 2023 Issued
Array ( [id] => 18555184 [patent_doc_number] => 20230253201 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-10 [patent_title] => CHALCOGEN PRECURSORS FOR DEPOSITION OF SILICON NITRIDE [patent_app_type] => utility [patent_app_number] => 18/134802 [patent_app_country] => US [patent_app_date] => 2023-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7855 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18134802 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/134802
Chalcogen precursors for deposition of silicon nitride Apr 13, 2023 Issued
Array ( [id] => 18712766 [patent_doc_number] => 20230335399 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => SUBSTRATE PROCESSING METHOD [patent_app_type] => utility [patent_app_number] => 18/132547 [patent_app_country] => US [patent_app_date] => 2023-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10035 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18132547 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/132547
SUBSTRATE PROCESSING METHOD Apr 9, 2023 Pending
Array ( [id] => 18712761 [patent_doc_number] => 20230335394 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => FILM FORMING METHOD [patent_app_type] => utility [patent_app_number] => 18/194722 [patent_app_country] => US [patent_app_date] => 2023-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7826 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18194722 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/194722
Film forming method Apr 2, 2023 Issued
Array ( [id] => 19483963 [patent_doc_number] => 20240332005 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => METHODS FOR DEPOSITING DIELECTRIC FILMS WITH INCREASED STABILITY [patent_app_type] => utility [patent_app_number] => 18/192563 [patent_app_country] => US [patent_app_date] => 2023-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6695 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18192563 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/192563
METHODS FOR DEPOSITING DIELECTRIC FILMS WITH INCREASED STABILITY Mar 28, 2023 Pending
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