Search

Asok K. Sarkar

Examiner (ID: 5343, Phone: (571)272-1970 , Office: P/2891 )

Most Active Art Unit
2891
Art Unit(s)
2829, 2891, 2813
Total Applications
2309
Issued Applications
2017
Pending Applications
106
Abandoned Applications
207

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9656816 [patent_doc_number] => 20140227821 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-14 [patent_title] => 'P-TYPE DIFFUSION LAYER FORMING COMPOSITION' [patent_app_type] => utility [patent_app_number] => 14/262719 [patent_app_country] => US [patent_app_date] => 2014-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8537 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14262719 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/262719
P-type diffusion layer forming composition Apr 25, 2014 Issued
Array ( [id] => 10426013 [patent_doc_number] => 20150311024 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-29 [patent_title] => 'ELECTRODE COATING FOR ELECTRON EMISSION DEVICES WITHIN CAVITIES' [patent_app_type] => utility [patent_app_number] => 14/261246 [patent_app_country] => US [patent_app_date] => 2014-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6174 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14261246 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/261246
Electrode coating for electron emission devices within cavities Apr 23, 2014 Issued
Array ( [id] => 10584037 [patent_doc_number] => 09306165 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-05 [patent_title] => 'Replacement materials processes for forming cross point memory' [patent_app_type] => utility [patent_app_number] => 14/228104 [patent_app_country] => US [patent_app_date] => 2014-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 14461 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14228104 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/228104
Replacement materials processes for forming cross point memory Mar 26, 2014 Issued
Array ( [id] => 10426058 [patent_doc_number] => 20150311069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-29 [patent_title] => 'METHOD FOR MANUFACTURING SILICON CARBIDE SEMICONDUCTOR SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 14/647774 [patent_app_country] => US [patent_app_date] => 2014-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6546 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14647774 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/647774
Method for manufacturing silicon carbide semiconductor substrate Mar 25, 2014 Issued
Array ( [id] => 9599977 [patent_doc_number] => 20140196658 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-17 [patent_title] => 'INTEGRATED CHARGE PRODUCTION ARCHITECTURE' [patent_app_type] => utility [patent_app_number] => 14/215722 [patent_app_country] => US [patent_app_date] => 2014-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 21253 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14215722 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/215722
Method to fabricate vertically oriented anatase nanowires on a substrate Mar 16, 2014 Issued
Array ( [id] => 10659772 [patent_doc_number] => 20160005916 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-07 [patent_title] => 'Method of Making Photovoltaic Devices' [patent_app_type] => utility [patent_app_number] => 14/776081 [patent_app_country] => US [patent_app_date] => 2014-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6205 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14776081 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/776081
Method of Making Photovoltaic Devices Mar 13, 2014 Abandoned
Array ( [id] => 10059940 [patent_doc_number] => 09099303 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-04 [patent_title] => 'Method for manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/208280 [patent_app_country] => US [patent_app_date] => 2014-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 54 [patent_no_of_words] => 17083 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14208280 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/208280
Method for manufacturing semiconductor device Mar 12, 2014 Issued
Array ( [id] => 11246392 [patent_doc_number] => 09472439 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-18 [patent_title] => 'Reinforcing sheet and method for producing secondary mounted semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/775445 [patent_app_country] => US [patent_app_date] => 2014-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 13449 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14775445 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/775445
Reinforcing sheet and method for producing secondary mounted semiconductor device Mar 11, 2014 Issued
Array ( [id] => 11486948 [patent_doc_number] => 09593012 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-14 [patent_title] => 'Method for producing a micromechanical component, and corresponding micromechanical component' [patent_app_type] => utility [patent_app_number] => 14/774799 [patent_app_country] => US [patent_app_date] => 2014-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 2882 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14774799 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/774799
Method for producing a micromechanical component, and corresponding micromechanical component Mar 11, 2014 Issued
Array ( [id] => 10531385 [patent_doc_number] => 09257529 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-09 [patent_title] => 'Method of forming self-aligned contacts using a replacement metal gate process in a semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/203838 [patent_app_country] => US [patent_app_date] => 2014-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 4532 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14203838 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/203838
Method of forming self-aligned contacts using a replacement metal gate process in a semiconductor device Mar 10, 2014 Issued
Array ( [id] => 10689431 [patent_doc_number] => 20160035577 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-04 [patent_title] => 'MULTI-LAYER MASK INCLUDING NON-PHOTODEFINABLE LASER ENERGY ABSORBING LAYER FOR SUBSTRATE DICING BY LASER AND PLASMA ETCH' [patent_app_type] => utility [patent_app_number] => 14/775651 [patent_app_country] => US [patent_app_date] => 2014-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7669 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14775651 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/775651
Multi-layer mask including non-photodefinable laser energy absorbing layer for substrate dicing by laser and plasma etch Mar 10, 2014 Issued
Array ( [id] => 10370298 [patent_doc_number] => 20150255303 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-10 [patent_title] => 'HARD MASK REMOVAL SCHEME' [patent_app_type] => utility [patent_app_number] => 14/202876 [patent_app_country] => US [patent_app_date] => 2014-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2843 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14202876 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/202876
Hard mask removal scheme Mar 9, 2014 Issued
Array ( [id] => 10035367 [patent_doc_number] => 09076688 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-07-07 [patent_title] => 'Scatterometry for nested and isolated structures' [patent_app_type] => utility [patent_app_number] => 14/202675 [patent_app_country] => US [patent_app_date] => 2014-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 4360 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14202675 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/202675
Scatterometry for nested and isolated structures Mar 9, 2014 Issued
Array ( [id] => 10551479 [patent_doc_number] => 09276113 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-01 [patent_title] => 'Structure and method to make strained FinFET with improved junction capacitance and low leakage' [patent_app_type] => utility [patent_app_number] => 14/202525 [patent_app_country] => US [patent_app_date] => 2014-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7137 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14202525 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/202525
Structure and method to make strained FinFET with improved junction capacitance and low leakage Mar 9, 2014 Issued
Array ( [id] => 10370395 [patent_doc_number] => 20150255400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-10 [patent_title] => 'Method for Forming Alignment Marks and Structure of Same' [patent_app_type] => utility [patent_app_number] => 14/203242 [patent_app_country] => US [patent_app_date] => 2014-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4139 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14203242 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/203242
Method for forming alignment marks and structure of same Mar 9, 2014 Issued
Array ( [id] => 10370524 [patent_doc_number] => 20150255529 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-10 [patent_title] => 'SILICON PROCESS COMPATIBLE TRENCH MAGNETIC DEVICE' [patent_app_type] => utility [patent_app_number] => 14/200503 [patent_app_country] => US [patent_app_date] => 2014-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7936 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14200503 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/200503
Silicon process compatible trench magnetic device Mar 6, 2014 Issued
Array ( [id] => 10370600 [patent_doc_number] => 20150255605 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-10 [patent_title] => 'METHOD TO ENHANCE STRAIN IN FULLY ISOLATED FINFET STRUCTURES' [patent_app_type] => utility [patent_app_number] => 14/201555 [patent_app_country] => US [patent_app_date] => 2014-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7241 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14201555 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/201555
Method to enhance strain in fully isolated finFET structures Mar 6, 2014 Issued
Array ( [id] => 10041985 [patent_doc_number] => 09082698 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-07-14 [patent_title] => 'Methods to improve FinFet semiconductor device behavior using co-implantation under the channel region' [patent_app_type] => utility [patent_app_number] => 14/201122 [patent_app_country] => US [patent_app_date] => 2014-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5648 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14201122 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/201122
Methods to improve FinFet semiconductor device behavior using co-implantation under the channel region Mar 6, 2014 Issued
Array ( [id] => 10077138 [patent_doc_number] => 09114976 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-08-25 [patent_title] => 'Semiconductor arrangement with stress release configuration' [patent_app_type] => utility [patent_app_number] => 14/200075 [patent_app_country] => US [patent_app_date] => 2014-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 4448 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14200075 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/200075
Semiconductor arrangement with stress release configuration Mar 6, 2014 Issued
Array ( [id] => 10370571 [patent_doc_number] => 20150255576 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-10 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/201373 [patent_app_country] => US [patent_app_date] => 2014-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2008 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14201373 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/201373
Semiconductor device and method for fabricating the same Mar 6, 2014 Issued
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