
Asok K. Sarkar
Examiner (ID: 5343, Phone: (571)272-1970 , Office: P/2891 )
| Most Active Art Unit | 2891 |
| Art Unit(s) | 2829, 2891, 2813 |
| Total Applications | 2309 |
| Issued Applications | 2017 |
| Pending Applications | 106 |
| Abandoned Applications | 207 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20360101
[patent_doc_number] => 12476106
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-11-18
[patent_title] => Selective deposition of organic material
[patent_app_type] => utility
[patent_app_number] => 17/936607
[patent_app_country] => US
[patent_app_date] => 2022-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 7942
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17936607
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/936607 | Selective deposition of organic material | Sep 28, 2022 | Issued |
Array
(
[id] => 18285757
[patent_doc_number] => 20230101229
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-30
[patent_title] => MULTIPLE-LAYER METHOD AND SYSTEM FOR FORMING MATERIAL WITHIN A GAP
[patent_app_type] => utility
[patent_app_number] => 17/953585
[patent_app_country] => US
[patent_app_date] => 2022-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9258
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 56
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17953585
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/953585 | Multiple-layer method and system for forming material within a gap | Sep 26, 2022 | Issued |
Array
(
[id] => 18112854
[patent_doc_number] => 20230005734
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-01-05
[patent_title] => METHOD OF FORMING AN ELECTRONIC STRUCTURE USING REFORMING GAS, SYSTEM FOR PERFORMING THE METHOD, AND STRUCTURE FORMED USING THE METHOD
[patent_app_type] => utility
[patent_app_number] => 17/944583
[patent_app_country] => US
[patent_app_date] => 2022-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6025
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17944583
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/944583 | Method of forming an electronic structure using reforming gas, system for performing the method, and structure formed using the method | Sep 13, 2022 | Issued |
Array
(
[id] => 19500401
[patent_doc_number] => 20240339419
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-10
[patent_title] => SILICON CARBIDE SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/681997
[patent_app_country] => US
[patent_app_date] => 2022-09-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6012
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18681997
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/681997 | Silicon carbide semiconductor device | Sep 4, 2022 | Issued |
Array
(
[id] => 18252028
[patent_doc_number] => 20230079067
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-16
[patent_title] => Method of Deposition
[patent_app_type] => utility
[patent_app_number] => 17/891089
[patent_app_country] => US
[patent_app_date] => 2022-08-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3483
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17891089
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/891089 | Method of deposition | Aug 17, 2022 | Issued |
Array
(
[id] => 19875127
[patent_doc_number] => 12268013
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-04-01
[patent_title] => High-resistance resistor based on silicon carbide and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 17/885570
[patent_app_country] => US
[patent_app_date] => 2022-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2214
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17885570
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/885570 | High-resistance resistor based on silicon carbide and manufacturing method thereof | Aug 10, 2022 | Issued |
Array
(
[id] => 18757732
[patent_doc_number] => 20230361195
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-09
[patent_title] => SOURCE-BODY SELF-ALIGNED METHOD OF A VERTICAL DOUBLE DIFFUSED METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR
[patent_app_type] => utility
[patent_app_number] => 17/878443
[patent_app_country] => US
[patent_app_date] => 2022-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6611
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 348
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17878443
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/878443 | Source-body self-aligned method of a vertical double diffused metal oxide semiconductor field effect transistor | Jul 31, 2022 | Issued |
Array
(
[id] => 19260924
[patent_doc_number] => 12020989
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-06-25
[patent_title] => Structure for fringing capacitance control
[patent_app_type] => utility
[patent_app_number] => 17/815519
[patent_app_country] => US
[patent_app_date] => 2022-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 21
[patent_no_of_words] => 6232
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17815519
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/815519 | Structure for fringing capacitance control | Jul 26, 2022 | Issued |
Array
(
[id] => 19943582
[patent_doc_number] => 12315718
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-05-27
[patent_title] => Forming films with improved film quality
[patent_app_type] => utility
[patent_app_number] => 17/873597
[patent_app_country] => US
[patent_app_date] => 2022-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 6271
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17873597
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/873597 | Forming films with improved film quality | Jul 25, 2022 | Issued |
Array
(
[id] => 18008417
[patent_doc_number] => 20220367184
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-17
[patent_title] => METAL-ORGANIC PULSED LASER DEPOSITION FOR STOICHIOMETRIC COMPLEX OXIDE THIN FILMS
[patent_app_type] => utility
[patent_app_number] => 17/814565
[patent_app_country] => US
[patent_app_date] => 2022-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6780
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 51
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17814565
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/814565 | Metal-organic pulsed laser deposition for stoichiometric complex oxide thin films | Jul 24, 2022 | Issued |
Array
(
[id] => 18901805
[patent_doc_number] => 20240017290
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-01-18
[patent_title] => Methods For Stabilization Of Self-Assembled Monolayers (SAMs) Using Sequentially Pulsed Initiated Chemical Vapor Deposition (spiCVD)
[patent_app_type] => utility
[patent_app_number] => 17/867010
[patent_app_country] => US
[patent_app_date] => 2022-07-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15721
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17867010
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/867010 | Methods for stabilization of self-assembled monolayers (SAMs) using sequentially pulsed initiated chemical vapor deposition (spiCVD) | Jul 17, 2022 | Issued |
Array
(
[id] => 18163972
[patent_doc_number] => 20230030566
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-02-02
[patent_title] => SUBSTRATE PROCESSING METHOD
[patent_app_type] => utility
[patent_app_number] => 17/866730
[patent_app_country] => US
[patent_app_date] => 2022-07-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7141
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 44
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17866730
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/866730 | Substrate processing method | Jul 17, 2022 | Issued |
Array
(
[id] => 20161337
[patent_doc_number] => 12387972
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-08-12
[patent_title] => Method for manufacturing shallow trench isolation structure, shallow trench isolation structure and semiconductor structure
[patent_app_type] => utility
[patent_app_number] => 17/812721
[patent_app_country] => US
[patent_app_date] => 2022-07-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 1202
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 194
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17812721
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/812721 | Method for manufacturing shallow trench isolation structure, shallow trench isolation structure and semiconductor structure | Jul 13, 2022 | Issued |
Array
(
[id] => 19467957
[patent_doc_number] => 20240321627
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-26
[patent_title] => METHOD FOR PRODUCING AN ELECTRONIC SEMICONDUCTOR COMPONENT
[patent_app_type] => utility
[patent_app_number] => 18/578143
[patent_app_country] => US
[patent_app_date] => 2022-07-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10661
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -38
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18578143
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/578143 | METHOD FOR PRODUCING AN ELECTRONIC SEMICONDUCTOR COMPONENT | Jul 11, 2022 | Pending |
Array
(
[id] => 17985921
[patent_doc_number] => 20220351958
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-03
[patent_title] => METHOD FOR SELECTIVE DEPOSITION OF SILICON NITRIDE LAYER AND STRUCTURE INCLUDING SELECTIVELY-DEPOSITED SILICON NITRIDE LAYER
[patent_app_type] => utility
[patent_app_number] => 17/859929
[patent_app_country] => US
[patent_app_date] => 2022-07-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3833
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17859929
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/859929 | Method for selective deposition of silicon nitride layer and structure including selectively-deposited silicon nitride layer | Jul 6, 2022 | Issued |
Array
(
[id] => 18983706
[patent_doc_number] => 11908896
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-02-20
[patent_title] => Integrated circuit structure with non-gated well tap cell
[patent_app_type] => utility
[patent_app_number] => 17/859731
[patent_app_country] => US
[patent_app_date] => 2022-07-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 17
[patent_no_of_words] => 6977
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17859731
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/859731 | Integrated circuit structure with non-gated well tap cell | Jul 6, 2022 | Issued |
Array
(
[id] => 18149963
[patent_doc_number] => 20230023820
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-01-26
[patent_title] => METHOD OF PROCESSING WAFER
[patent_app_type] => utility
[patent_app_number] => 17/809747
[patent_app_country] => US
[patent_app_date] => 2022-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8262
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -4
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17809747
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/809747 | Method of processing wafer | Jun 28, 2022 | Issued |
Array
(
[id] => 19972452
[patent_doc_number] => 12341073
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-06-24
[patent_title] => Forming method of semiconductor structure and semiconductor structure
[patent_app_type] => utility
[patent_app_number] => 17/808352
[patent_app_country] => US
[patent_app_date] => 2022-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 3111
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17808352
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/808352 | Forming method of semiconductor structure and semiconductor structure | Jun 22, 2022 | Issued |
Array
(
[id] => 20148395
[patent_doc_number] => 12382756
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-08-05
[patent_title] => Micro light-emitting element, micro light-emitting element array including the micro light-emitting element, and display device including the micro light-emitting element array
[patent_app_type] => utility
[patent_app_number] => 17/847637
[patent_app_country] => US
[patent_app_date] => 2022-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 48
[patent_figures_cnt] => 48
[patent_no_of_words] => 16952
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17847637
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/847637 | Micro light-emitting element, micro light-emitting element array including the micro light-emitting element, and display device including the micro light-emitting element array | Jun 22, 2022 | Issued |
Array
(
[id] => 17913663
[patent_doc_number] => 20220316058
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-06
[patent_title] => METHOD OF PROCESSING SUBSTRATE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS AND RECORDING MEDIUM
[patent_app_type] => utility
[patent_app_number] => 17/843436
[patent_app_country] => US
[patent_app_date] => 2022-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14551
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17843436
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/843436 | Method of processing substrate, method of manufacturing semiconductor device, substrate processing apparatus and recording medium | Jun 16, 2022 | Issued |