Search

Atul Trivedi

Examiner (ID: 392, Phone: (313)446-4908 , Office: P/3667 )

Most Active Art Unit
3661
Art Unit(s)
3661, 3667
Total Applications
907
Issued Applications
782
Pending Applications
78
Abandoned Applications
67

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15656485 [patent_doc_number] => 20200090773 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/684178 [patent_app_country] => US [patent_app_date] => 2019-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13575 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16684178 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/684178
Semiconductor memory device Nov 13, 2019 Issued
Array ( [id] => 15563813 [patent_doc_number] => 20200066318 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-27 [patent_title] => MEMORY SYSTEM THAT SUPPORTS DUAL-MODE MODULATION [patent_app_type] => utility [patent_app_number] => 16/666045 [patent_app_country] => US [patent_app_date] => 2019-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 36970 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16666045 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/666045
Memory system that supports dual-mode modulation Oct 27, 2019 Issued
Array ( [id] => 15502903 [patent_doc_number] => 20200051640 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-13 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/659407 [patent_app_country] => US [patent_app_date] => 2019-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25315 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16659407 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/659407
Semiconductor memory device Oct 20, 2019 Issued
Array ( [id] => 16601293 [patent_doc_number] => 20210027824 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-28 [patent_title] => MEMORY INTERFACE CIRCUIT, MEMORY STORAGE DEVICE AND CONFIGURATION STATUS CHECKING METHOD [patent_app_type] => utility [patent_app_number] => 16/568193 [patent_app_country] => US [patent_app_date] => 2019-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4906 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16568193 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/568193
Memory interface circuit, memory storage device and configuration status checking method Sep 10, 2019 Issued
Array ( [id] => 17861714 [patent_doc_number] => 11442872 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-13 [patent_title] => Memory refresh operations using reduced power [patent_app_type] => utility [patent_app_number] => 16/545949 [patent_app_country] => US [patent_app_date] => 2019-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 6052 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16545949 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/545949
Memory refresh operations using reduced power Aug 19, 2019 Issued
Array ( [id] => 15563881 [patent_doc_number] => 20200066352 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-27 [patent_title] => HIGH VOLTAGE ARCHITECTURE FOR NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 16/531890 [patent_app_country] => US [patent_app_date] => 2019-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7323 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16531890 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/531890
HIGH VOLTAGE ARCHITECTURE FOR NON-VOLATILE MEMORY Aug 4, 2019 Abandoned
Array ( [id] => 16706335 [patent_doc_number] => 10956268 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-23 [patent_title] => Systems, methods, and apparatuses for stacked memory [patent_app_type] => utility [patent_app_number] => 16/529716 [patent_app_country] => US [patent_app_date] => 2019-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 9284 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16529716 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/529716
Systems, methods, and apparatuses for stacked memory Jul 31, 2019 Issued
Array ( [id] => 16201726 [patent_doc_number] => 10726901 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-07-28 [patent_title] => Dual-domain memory [patent_app_type] => utility [patent_app_number] => 16/528514 [patent_app_country] => US [patent_app_date] => 2019-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 8532 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16528514 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/528514
Dual-domain memory Jul 30, 2019 Issued
Array ( [id] => 17683214 [patent_doc_number] => 11367474 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-21 [patent_title] => Electric-field-induced switching of antiferromagnetic memory devices [patent_app_type] => utility [patent_app_number] => 17/260113 [patent_app_country] => US [patent_app_date] => 2019-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 29 [patent_no_of_words] => 7682 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17260113 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/260113
Electric-field-induced switching of antiferromagnetic memory devices Jul 16, 2019 Issued
Array ( [id] => 15889093 [patent_doc_number] => 10650895 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-12 [patent_title] => Memory devices with distributed block select for a vertical string driver tile architecture [patent_app_type] => utility [patent_app_number] => 16/446234 [patent_app_country] => US [patent_app_date] => 2019-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4590 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16446234 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/446234
Memory devices with distributed block select for a vertical string driver tile architecture Jun 18, 2019 Issued
Array ( [id] => 16575002 [patent_doc_number] => 10896930 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-19 [patent_title] => Memory including a selector switch on a variable resistance memory cell [patent_app_type] => utility [patent_app_number] => 16/440596 [patent_app_country] => US [patent_app_date] => 2019-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3842 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16440596 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/440596
Memory including a selector switch on a variable resistance memory cell Jun 12, 2019 Issued
Array ( [id] => 16759610 [patent_doc_number] => 10978165 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-13 [patent_title] => Memory system and non-volatile semiconductor memory [patent_app_type] => utility [patent_app_number] => 16/435694 [patent_app_country] => US [patent_app_date] => 2019-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 40 [patent_no_of_words] => 19946 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16435694 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/435694
Memory system and non-volatile semiconductor memory Jun 9, 2019 Issued
Array ( [id] => 16233707 [patent_doc_number] => 10741267 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-11 [patent_title] => Memory cell with two anti-fuse elements [patent_app_type] => utility [patent_app_number] => 16/435554 [patent_app_country] => US [patent_app_date] => 2019-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3667 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16435554 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/435554
Memory cell with two anti-fuse elements Jun 8, 2019 Issued
Array ( [id] => 15687539 [patent_doc_number] => 20200098433 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => MEMORY DEVICE AND METHOD OF READING DATA [patent_app_type] => utility [patent_app_number] => 16/434968 [patent_app_country] => US [patent_app_date] => 2019-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10726 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16434968 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/434968
Memory device and method of reading data Jun 6, 2019 Issued
Array ( [id] => 15273873 [patent_doc_number] => 20190385671 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => MULTI WORD LINE ASSERTION [patent_app_type] => utility [patent_app_number] => 16/434746 [patent_app_country] => US [patent_app_date] => 2019-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4834 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16434746 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/434746
Multi word line assertion Jun 6, 2019 Issued
Array ( [id] => 16653153 [patent_doc_number] => 10930344 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-23 [patent_title] => RRAM circuit and method [patent_app_type] => utility [patent_app_number] => 16/422924 [patent_app_country] => US [patent_app_date] => 2019-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 11704 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16422924 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/422924
RRAM circuit and method May 23, 2019 Issued
Array ( [id] => 16356217 [patent_doc_number] => 10796734 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-10-06 [patent_title] => Apparatuses including temperature-based threshold voltage compensated sense amplifiers and methods for compensating same [patent_app_type] => utility [patent_app_number] => 16/422650 [patent_app_country] => US [patent_app_date] => 2019-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 7928 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16422650 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/422650
Apparatuses including temperature-based threshold voltage compensated sense amplifiers and methods for compensating same May 23, 2019 Issued
Array ( [id] => 15624989 [patent_doc_number] => 20200082899 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => MEMORY DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/422684 [patent_app_country] => US [patent_app_date] => 2019-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10048 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16422684 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/422684
Memory device and operating method thereof May 23, 2019 Issued
Array ( [id] => 15806911 [patent_doc_number] => 20200126598 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-23 [patent_title] => DYNAMIC POWER CONTROL SYSTEM FOR MEMORY DEVICE AND MEMORY DEVICE USING THE SAME [patent_app_type] => utility [patent_app_number] => 16/419384 [patent_app_country] => US [patent_app_date] => 2019-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4577 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16419384 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/419384
Dynamic power control system for memory device and memory device using the same May 21, 2019 Issued
Array ( [id] => 16034573 [patent_doc_number] => 10679713 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-09 [patent_title] => Semiconductor storage device [patent_app_type] => utility [patent_app_number] => 16/397342 [patent_app_country] => US [patent_app_date] => 2019-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 13456 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16397342 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/397342
Semiconductor storage device Apr 28, 2019 Issued
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