Search

Aurangzeb Hassan

Examiner (ID: 18198, Phone: (571)272-8625 , Office: P/2184 )

Most Active Art Unit
2184
Art Unit(s)
2182, 2184
Total Applications
858
Issued Applications
624
Pending Applications
78
Abandoned Applications
179

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17757406 [patent_doc_number] => 11397698 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-26 [patent_title] => Asynchronous communication protocol compatible with synchronous DDR protocol [patent_app_type] => utility [patent_app_number] => 16/777206 [patent_app_country] => US [patent_app_date] => 2020-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 7045 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16777206 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/777206
Asynchronous communication protocol compatible with synchronous DDR protocol Jan 29, 2020 Issued
Array ( [id] => 17818240 [patent_doc_number] => 11423861 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-23 [patent_title] => Method for reducing required time of scanning a plurality of transmission ports and scanning system thereof [patent_app_type] => utility [patent_app_number] => 16/734388 [patent_app_country] => US [patent_app_date] => 2020-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4878 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16734388 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/734388
Method for reducing required time of scanning a plurality of transmission ports and scanning system thereof Jan 4, 2020 Issued
Array ( [id] => 16095629 [patent_doc_number] => 20200201801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-25 [patent_title] => METHOD FOR AUTHENTICATING AN EQUIPMENT, ASSOCIATED EMITTING DEVICE, RECEPTION DEVICE, COMMUNICATION SYSTEM AND AIRCRAFT [patent_app_type] => utility [patent_app_number] => 16/717733 [patent_app_country] => US [patent_app_date] => 2019-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2602 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16717733 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/717733
Method for authenticating an equipment, associated emitting device, reception device, communication system and aircraft Dec 16, 2019 Issued
Array ( [id] => 17017163 [patent_doc_number] => 11086804 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-10 [patent_title] => Storage system and method for reducing read-retry duration [patent_app_type] => utility [patent_app_number] => 16/708006 [patent_app_country] => US [patent_app_date] => 2019-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6611 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16708006 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/708006
Storage system and method for reducing read-retry duration Dec 8, 2019 Issued
Array ( [id] => 17846441 [patent_doc_number] => 11435811 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-06 [patent_title] => Memory device sensors [patent_app_type] => utility [patent_app_number] => 16/707488 [patent_app_country] => US [patent_app_date] => 2019-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 7818 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16707488 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/707488
Memory device sensors Dec 8, 2019 Issued
Array ( [id] => 16371242 [patent_doc_number] => 10803003 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-10-13 [patent_title] => Method for operating data recording system [patent_app_type] => utility [patent_app_number] => 16/706785 [patent_app_country] => US [patent_app_date] => 2019-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1996 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16706785 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/706785
Method for operating data recording system Dec 7, 2019 Issued
Array ( [id] => 16535161 [patent_doc_number] => 10877761 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-29 [patent_title] => Write reordering in a multiprocessor system [patent_app_type] => utility [patent_app_number] => 16/706749 [patent_app_country] => US [patent_app_date] => 2019-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4884 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16706749 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/706749
Write reordering in a multiprocessor system Dec 7, 2019 Issued
Array ( [id] => 18015224 [patent_doc_number] => 11507522 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-22 [patent_title] => Memory request priority assignment techniques for parallel processors [patent_app_type] => utility [patent_app_number] => 16/706421 [patent_app_country] => US [patent_app_date] => 2019-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5092 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16706421 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/706421
Memory request priority assignment techniques for parallel processors Dec 5, 2019 Issued
Array ( [id] => 16872128 [patent_doc_number] => 20210165595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => PAD INDICATION FOR DEVICE CAPABILITY [patent_app_type] => utility [patent_app_number] => 16/700501 [patent_app_country] => US [patent_app_date] => 2019-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14760 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16700501 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/700501
Pad indication for device capability Dec 1, 2019 Issued
Array ( [id] => 16378105 [patent_doc_number] => 20200326947 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-15 [patent_title] => MULTI-LANE DATA PROCESSING CIRCUIT AND SYSTEM [patent_app_type] => utility [patent_app_number] => 16/698349 [patent_app_country] => US [patent_app_date] => 2019-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8058 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16698349 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/698349
Multi-lane data processing circuit and system Nov 26, 2019 Issued
Array ( [id] => 16802078 [patent_doc_number] => 10997022 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-05-04 [patent_title] => Storing data in accordance with encoded data slice revision levels in a storage network [patent_app_type] => utility [patent_app_number] => 16/692472 [patent_app_country] => US [patent_app_date] => 2019-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 55 [patent_no_of_words] => 32649 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16692472 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/692472
Storing data in accordance with encoded data slice revision levels in a storage network Nov 21, 2019 Issued
Array ( [id] => 15656361 [patent_doc_number] => 20200090711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => TWO PIN SERIAL BUS COMMUNICATION INTERFACE AND PROCESS [patent_app_type] => utility [patent_app_number] => 16/689691 [patent_app_country] => US [patent_app_date] => 2019-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15351 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16689691 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/689691
Bidirectional data pin, clock input pin, shift register, debug circuitry Nov 19, 2019 Issued
Array ( [id] => 17394886 [patent_doc_number] => 11243900 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-08 [patent_title] => Data transmission method and device [patent_app_type] => utility [patent_app_number] => 16/670193 [patent_app_country] => US [patent_app_date] => 2019-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 11020 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16670193 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/670193
Data transmission method and device Oct 30, 2019 Issued
Array ( [id] => 15562249 [patent_doc_number] => 20200065536 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-27 [patent_title] => SYSTEM FOR PROVIDING INTERIM CHARGING CAPABILITY FOR A MOBILE DEVICE [patent_app_type] => utility [patent_app_number] => 16/667730 [patent_app_country] => US [patent_app_date] => 2019-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16516 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16667730 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/667730
SYSTEM FOR PROVIDING INTERIM CHARGING CAPABILITY FOR A MOBILE DEVICE Oct 28, 2019 Abandoned
Array ( [id] => 17061876 [patent_doc_number] => 11106477 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-31 [patent_title] => Execution of owner-specified code during input/output path to object storage service [patent_app_type] => utility [patent_app_number] => 16/586619 [patent_app_country] => US [patent_app_date] => 2019-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 19983 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16586619 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/586619
Execution of owner-specified code during input/output path to object storage service Sep 26, 2019 Issued
Array ( [id] => 16607923 [patent_doc_number] => 10908927 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-02-02 [patent_title] => On-demand execution of object filter code in output path of object storage service [patent_app_type] => utility [patent_app_number] => 16/586539 [patent_app_country] => US [patent_app_date] => 2019-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 29248 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16586539 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/586539
On-demand execution of object filter code in output path of object storage service Sep 26, 2019 Issued
Array ( [id] => 16018053 [patent_doc_number] => 20200183870 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-11 [patent_title] => BUS PROTOCOL FOR MULTIPLE CHIPSETS [patent_app_type] => utility [patent_app_number] => 16/584686 [patent_app_country] => US [patent_app_date] => 2019-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6013 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16584686 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/584686
Bus protocol for multiple chipsets Sep 25, 2019 Issued
Array ( [id] => 15328773 [patent_doc_number] => 20200004716 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => PCIE SWITCH FOR AGGREGATING A LARGE NUMBER OF ENDPOINT DEVICES [patent_app_type] => utility [patent_app_number] => 16/567397 [patent_app_country] => US [patent_app_date] => 2019-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5665 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16567397 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/567397
PCIe switch for aggregating a large number of endpoint devices Sep 10, 2019 Issued
Array ( [id] => 16431604 [patent_doc_number] => 10831686 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-11-10 [patent_title] => Method of determining hard disk operation status [patent_app_type] => utility [patent_app_number] => 16/564074 [patent_app_country] => US [patent_app_date] => 2019-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3341 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16564074 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/564074
Method of determining hard disk operation status Sep 8, 2019 Issued
Array ( [id] => 16844695 [patent_doc_number] => 11016781 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-25 [patent_title] => Methods and memory modules for enabling vendor specific functionalities [patent_app_type] => utility [patent_app_number] => 16/563053 [patent_app_country] => US [patent_app_date] => 2019-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 7256 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16563053 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/563053
Methods and memory modules for enabling vendor specific functionalities Sep 5, 2019 Issued
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