Search

Aurangzeb Hassan

Examiner (ID: 18198, Phone: (571)272-8625 , Office: P/2184 )

Most Active Art Unit
2184
Art Unit(s)
2182, 2184
Total Applications
858
Issued Applications
624
Pending Applications
78
Abandoned Applications
179

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11403810 [patent_doc_number] => 20170024348 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-26 [patent_title] => 'Folded Memory Modules' [patent_app_type] => utility [patent_app_number] => 15/289785 [patent_app_country] => US [patent_app_date] => 2016-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4288 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15289785 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/289785
Folded memory modules Oct 9, 2016 Issued
Array ( [id] => 13497473 [patent_doc_number] => 20180300279 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-18 [patent_title] => Bus Coupling Unit And Bus System Having A Bus Coupling Unit [patent_app_type] => utility [patent_app_number] => 15/766930 [patent_app_country] => US [patent_app_date] => 2016-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3763 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15766930 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/766930
Bus coupling unit and bus system having a bus coupling unit Sep 22, 2016 Issued
Array ( [id] => 11385727 [patent_doc_number] => 20170011783 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-12 [patent_title] => 'TWO PIN SERIAL BUS COMMUNICATION INTERFACE AND PROCESS' [patent_app_type] => utility [patent_app_number] => 15/270673 [patent_app_country] => US [patent_app_date] => 2016-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 15849 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15270673 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/270673
2-pin interface data input and output, controller and instruction circuitry Sep 19, 2016 Issued
Array ( [id] => 11366116 [patent_doc_number] => 20170004097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-05 [patent_title] => 'SYSTEM BUS TRANSACTION QUEUE REALLOCATION' [patent_app_type] => utility [patent_app_number] => 15/265057 [patent_app_country] => US [patent_app_date] => 2016-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5856 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15265057 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/265057
System bus transaction queue reallocation Sep 13, 2016 Issued
Array ( [id] => 11501659 [patent_doc_number] => 20170075844 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-16 [patent_title] => 'COMMUNICATION DEVICE, COMMUNICATION METHOD, AND NON-TRANSITORY COMPUTER READABLE MEDIUM' [patent_app_type] => utility [patent_app_number] => 15/264910 [patent_app_country] => US [patent_app_date] => 2016-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12830 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15264910 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/264910
COMMUNICATION DEVICE, COMMUNICATION METHOD, AND NON-TRANSITORY COMPUTER READABLE MEDIUM Sep 13, 2016 Abandoned
Array ( [id] => 13669193 [patent_doc_number] => 10164786 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-25 [patent_title] => Industry internet field broadband bus architecture system [patent_app_type] => utility [patent_app_number] => 15/264123 [patent_app_country] => US [patent_app_date] => 2016-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6427 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 373 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15264123 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/264123
Industry internet field broadband bus architecture system Sep 12, 2016 Issued
Array ( [id] => 13721755 [patent_doc_number] => 20170371832 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-28 [patent_title] => METHOD FOR CLOCK SYNCHRONIZATION OF AN INDUSTRIAL INTERNET FIELD BROADBAND BUS [patent_app_type] => utility [patent_app_number] => 15/264033 [patent_app_country] => US [patent_app_date] => 2016-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3956 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15264033 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/264033
Method for clock synchronization of an industrial internet field broadband bus Sep 12, 2016 Issued
Array ( [id] => 15075061 [patent_doc_number] => 10467021 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-05 [patent_title] => High density multi node computer with improved efficiency, thermal control, and compute performance [patent_app_type] => utility [patent_app_number] => 15/264441 [patent_app_country] => US [patent_app_date] => 2016-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 8854 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15264441 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/264441
High density multi node computer with improved efficiency, thermal control, and compute performance Sep 12, 2016 Issued
Array ( [id] => 13669191 [patent_doc_number] => 10164785 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-25 [patent_title] => Method for implementing a real-time industrial internet field broadband bus [patent_app_type] => utility [patent_app_number] => 15/263955 [patent_app_country] => US [patent_app_date] => 2016-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 5993 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 320 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15263955 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/263955
Method for implementing a real-time industrial internet field broadband bus Sep 12, 2016 Issued
Array ( [id] => 14151181 [patent_doc_number] => 10255974 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-09 [patent_title] => Electronic devices having semiconductor magnetic memory units [patent_app_type] => utility [patent_app_number] => 15/256694 [patent_app_country] => US [patent_app_date] => 2016-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 23674 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 334 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15256694 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/256694
Electronic devices having semiconductor magnetic memory units Sep 4, 2016 Issued
Array ( [id] => 12188496 [patent_doc_number] => 20180047432 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-15 [patent_title] => 'SEMICONDUCTOR LAYERED DEVICE WITH DATA BUS' [patent_app_type] => utility [patent_app_number] => 15/233821 [patent_app_country] => US [patent_app_date] => 2016-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7896 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15233821 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/233821
Semiconductor layered device with data bus Aug 9, 2016 Issued
Array ( [id] => 15758011 [patent_doc_number] => 10621119 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-14 [patent_title] => Asynchronous communication protocol compatible with synchronous DDR protocol [patent_app_type] => utility [patent_app_number] => 15/233850 [patent_app_country] => US [patent_app_date] => 2016-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 7008 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15233850 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/233850
Asynchronous communication protocol compatible with synchronous DDR protocol Aug 9, 2016 Issued
Array ( [id] => 16802146 [patent_doc_number] => 10997090 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-04 [patent_title] => Accessing input/output devices of detachable peripheral by a main computer [patent_app_type] => utility [patent_app_number] => 16/303484 [patent_app_country] => US [patent_app_date] => 2016-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7934 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16303484 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/303484
Accessing input/output devices of detachable peripheral by a main computer Jun 27, 2016 Issued
Array ( [id] => 13665249 [patent_doc_number] => 10162787 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-12-25 [patent_title] => Multicore safe PCIe solution [patent_app_type] => utility [patent_app_number] => 15/192148 [patent_app_country] => US [patent_app_date] => 2016-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3207 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15192148 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/192148
Multicore safe PCIe solution Jun 23, 2016 Issued
Array ( [id] => 13679931 [patent_doc_number] => 20160378702 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-29 [patent_title] => RECEIVER PACKET HANDLING [patent_app_type] => utility [patent_app_number] => 15/192723 [patent_app_country] => US [patent_app_date] => 2016-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4303 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15192723 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/192723
Receiver packet handling Jun 23, 2016 Issued
Array ( [id] => 11384945 [patent_doc_number] => 20170011001 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-12 [patent_title] => 'USB CONTROL CIRCUIT WITH BUILT-IN SIGNAL REPEATER CIRCUIT' [patent_app_type] => utility [patent_app_number] => 15/190898 [patent_app_country] => US [patent_app_date] => 2016-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3550 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15190898 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/190898
USB control circuit with built-in signal repeater circuit Jun 22, 2016 Issued
Array ( [id] => 14034665 [patent_doc_number] => 10229084 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-12 [patent_title] => Synchronous input / output hardware acknowledgement of write completions [patent_app_type] => utility [patent_app_number] => 15/190250 [patent_app_country] => US [patent_app_date] => 2016-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10154 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15190250 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/190250
Synchronous input / output hardware acknowledgement of write completions Jun 22, 2016 Issued
Array ( [id] => 13255061 [patent_doc_number] => 10140221 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-27 [patent_title] => Method to handle host, device, and link's latency tolerant requirements over USB Type-C power delivery using vendor defined messaging for all alternate modes [patent_app_type] => utility [patent_app_number] => 15/163888 [patent_app_country] => US [patent_app_date] => 2016-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4603 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15163888 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/163888
Method to handle host, device, and link's latency tolerant requirements over USB Type-C power delivery using vendor defined messaging for all alternate modes May 24, 2016 Issued
Array ( [id] => 11338397 [patent_doc_number] => 20160364152 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-15 [patent_title] => 'DATA STORAGE DEVICE IDENTIFYING AN ELECTRONIC DEVICE TO A HARDWARE-SWITCHING DEVICE' [patent_app_type] => utility [patent_app_number] => 15/163953 [patent_app_country] => US [patent_app_date] => 2016-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7507 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15163953 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/163953
Data storage device identifying an electronic device to a hardware-switching device May 24, 2016 Issued
Array ( [id] => 13173955 [patent_doc_number] => 10103100 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-16 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 15/163647 [patent_app_country] => US [patent_app_date] => 2016-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 17796 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 270 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15163647 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/163647
Semiconductor device May 23, 2016 Issued
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