Search

Aurangzeb Hassan

Examiner (ID: 18198, Phone: (571)272-8625 , Office: P/2184 )

Most Active Art Unit
2184
Art Unit(s)
2182, 2184
Total Applications
858
Issued Applications
624
Pending Applications
78
Abandoned Applications
179

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11314149 [patent_doc_number] => 20160350259 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-01 [patent_title] => 'SYSTEM ON CHIP INCLUDING CLOCK MANAGEMENT UNIT AND METHOD OF OPERATING THE SYSTEM ON CHIP' [patent_app_type] => utility [patent_app_number] => 15/156825 [patent_app_country] => US [patent_app_date] => 2016-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 12347 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15156825 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/156825
System on chip including clock management unit and method of operating the system on chip May 16, 2016 Issued
Array ( [id] => 12053391 [patent_doc_number] => 20170329735 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-16 [patent_title] => 'HIGH AVAILABILITY OF PCIE DEVICES UNDER MULTIPLE PROCESSORS TO PROVIDE REDUNDANCY' [patent_app_type] => utility [patent_app_number] => 15/152387 [patent_app_country] => US [patent_app_date] => 2016-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4304 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15152387 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/152387
High availability of PCIe devices under multiple processors to provide redundancy May 10, 2016 Issued
Array ( [id] => 11982094 [patent_doc_number] => 20170286248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-05 [patent_title] => 'INTERFACE SWITCH FOR AUTOMATICALLY PERFORMING OPERATIONS IN AN EMBEDDED SYSTEM AND A METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/152181 [patent_app_country] => US [patent_app_date] => 2016-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6725 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15152181 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/152181
Interface switch for automatically performing operations in an embedded system and a method thereof May 10, 2016 Issued
Array ( [id] => 11338605 [patent_doc_number] => 20160364360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-15 [patent_title] => 'METHOD AND APPARATUS FOR PROVIDING INTERFACE' [patent_app_type] => utility [patent_app_number] => 15/151879 [patent_app_country] => US [patent_app_date] => 2016-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 21725 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15151879 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/151879
Method and apparatus for providing interface May 10, 2016 Issued
Array ( [id] => 13069167 [patent_doc_number] => 10055363 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-21 [patent_title] => Method for configuring an interface unit of a computer system [patent_app_type] => utility [patent_app_number] => 15/151746 [patent_app_country] => US [patent_app_date] => 2016-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6328 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 346 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15151746 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/151746
Method for configuring an interface unit of a computer system May 10, 2016 Issued
Array ( [id] => 14353879 [patent_doc_number] => 20190158913 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-23 [patent_title] => VIDEO OUTPUT SYSTEM, VIDEO OUTPUT DEVICE, AND CABLE [patent_app_type] => utility [patent_app_number] => 16/095947 [patent_app_country] => US [patent_app_date] => 2016-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9791 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16095947 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/095947
Video output system, video output device, and cable Apr 25, 2016 Issued
Array ( [id] => 13650175 [patent_doc_number] => 09851400 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-12-26 [patent_title] => System on a chip serial communication interface method and apparatus [patent_app_type] => utility [patent_app_number] => 15/050179 [patent_app_country] => US [patent_app_date] => 2016-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5181 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15050179 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/050179
System on a chip serial communication interface method and apparatus Feb 21, 2016 Issued
Array ( [id] => 11013297 [patent_doc_number] => 20160210250 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-21 [patent_title] => 'MOTHERBOARD WITH DUAL MEMORY SLOTS AND COMPUTER SYSTEM WITH THE SAME' [patent_app_type] => utility [patent_app_number] => 14/991282 [patent_app_country] => US [patent_app_date] => 2016-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1846 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14991282 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/991282
MOTHERBOARD WITH DUAL MEMORY SLOTS AND COMPUTER SYSTEM WITH THE SAME Jan 7, 2016 Abandoned
Array ( [id] => 11006149 [patent_doc_number] => 20160203099 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-14 [patent_title] => 'SYSTEM ON CHIP FOR PACKETIZING MULTIPLE BYTES AND DATA PROCESSING SYSTEM INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/989823 [patent_app_country] => US [patent_app_date] => 2016-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8113 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14989823 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/989823
System on chip for packetizing multiple bytes and data processing system including the same Jan 6, 2016 Issued
Array ( [id] => 11049790 [patent_doc_number] => 20160246749 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-25 [patent_title] => 'INFORMATION PROCESSING APPARATUS AND MULTIPATH CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 14/990039 [patent_app_country] => US [patent_app_date] => 2016-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10114 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14990039 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/990039
Information processing apparatus and multipath control method Jan 6, 2016 Issued
Array ( [id] => 11731474 [patent_doc_number] => 20170192917 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-06 [patent_title] => 'SYSTEMS AND METHODS FOR HARDWARE ARBITRATION OF A COMMUNICATIONS BUS' [patent_app_type] => utility [patent_app_number] => 14/989552 [patent_app_country] => US [patent_app_date] => 2016-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3574 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14989552 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/989552
Systems and methods for hardware arbitration of a communications bus Jan 5, 2016 Issued
Array ( [id] => 14123499 [patent_doc_number] => 10248609 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-02 [patent_title] => Modular interconnection system and components therefor [patent_app_type] => utility [patent_app_number] => 14/989054 [patent_app_country] => US [patent_app_date] => 2016-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6870 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14989054 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/989054
Modular interconnection system and components therefor Jan 5, 2016 Issued
Array ( [id] => 11717043 [patent_doc_number] => 20170185542 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-29 [patent_title] => 'Arbitration of requests requiring a variable number of resources' [patent_app_type] => utility [patent_app_number] => 14/757577 [patent_app_country] => US [patent_app_date] => 2015-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 11007 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14757577 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/757577
Arbitration of requests requiring a variable number of resources Dec 23, 2015 Issued
Array ( [id] => 10746208 [patent_doc_number] => 20160092359 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-31 [patent_title] => 'MULTI-GRANULAR CACHE MANAGEMENT IN MULTI-PROCESSOR COMPUTING ENVIRONMENTS' [patent_app_type] => utility [patent_app_number] => 14/963350 [patent_app_country] => US [patent_app_date] => 2015-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 29046 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14963350 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/963350
Multi-granular cache management in multi-processor computing environments Dec 8, 2015 Issued
Array ( [id] => 17271171 [patent_doc_number] => 11196610 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-07 [patent_title] => Transfer control apparatus, vehicle, and transfer control method [patent_app_type] => utility [patent_app_number] => 15/767560 [patent_app_country] => US [patent_app_date] => 2015-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6040 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 340 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15767560 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/767560
Transfer control apparatus, vehicle, and transfer control method Dec 3, 2015 Issued
Array ( [id] => 13974649 [patent_doc_number] => 10216681 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-26 [patent_title] => System and method for managing workloads and hot-swapping a co-processor of an information handling system [patent_app_type] => utility [patent_app_number] => 14/955977 [patent_app_country] => US [patent_app_date] => 2015-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9412 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14955977 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/955977
System and method for managing workloads and hot-swapping a co-processor of an information handling system Nov 30, 2015 Issued
Array ( [id] => 10808607 [patent_doc_number] => 20160154765 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-02 [patent_title] => 'STORAGE NODE BASED ON PCI EXPRESS INTERFACE' [patent_app_type] => utility [patent_app_number] => 14/956063 [patent_app_country] => US [patent_app_date] => 2015-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4585 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14956063 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/956063
Storage node based on PCI express interface Nov 30, 2015 Issued
Array ( [id] => 13817819 [patent_doc_number] => 10185678 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-01-22 [patent_title] => Universal offloading engine [patent_app_type] => utility [patent_app_number] => 14/954682 [patent_app_country] => US [patent_app_date] => 2015-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 14074 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14954682 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/954682
Universal offloading engine Nov 29, 2015 Issued
Array ( [id] => 12088337 [patent_doc_number] => 09842067 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-12-12 [patent_title] => 'Processor communications' [patent_app_type] => utility [patent_app_number] => 14/951023 [patent_app_country] => US [patent_app_date] => 2015-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7679 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14951023 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/951023
Processor communications Nov 23, 2015 Issued
Array ( [id] => 15121203 [patent_doc_number] => 20190347235 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-14 [patent_title] => Method and Apparatus for Forwarding Data [patent_app_type] => utility [patent_app_number] => 15/529890 [patent_app_country] => US [patent_app_date] => 2015-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6360 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15529890 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/529890
Method and apparatus for forwarding data Nov 23, 2015 Issued
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