Aurangzeb Hassan

Array ( [id] => 10625155 [patent_doc_number] => 09344113 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-05-17 [patent_title] => 'Lempel Ziv compression architecture' [patent_app_type] => utility [patent_app_number] => 14/105779 [patent_app_country] => US [patent_app_date] => 2013-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 8949 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14105779 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10276072 [patent_doc_number] => 20150161069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-11 [patent_title] => 'HANDLING TWO SGPIO CHANNELS USING SINGLE SGPIO DECODER ON A BACKPLANE CONTROLLER' [patent_app_type] => utility [patent_app_number] => 14/100613 [patent_app_country] => US [patent_app_date] => 2013-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10168 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14100613 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11430626 [patent_doc_number] => 09568940 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-14 [patent_title] => 'Multiple active vertically aligned cores for three-dimensional chip stack' [patent_app_type] => utility [patent_app_number] => 14/097647 [patent_app_country] => US [patent_app_date] => 2013-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12893 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14097647 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10276071 [patent_doc_number] => 20150161068 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-11 [patent_title] => 'Address Range Decomposition' [patent_app_type] => utility [patent_app_number] => 14/097924 [patent_app_country] => US [patent_app_date] => 2013-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9863 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14097924 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9520482 [patent_doc_number] => 20140156974 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-05 [patent_title] => 'DEVICE OPERATING INFORMATION PROVIDING DEVICE AND DEVICE OPERATING INFORMATION PROVIDING METHOD' [patent_app_type] => utility [patent_app_number] => 14/096271 [patent_app_country] => US [patent_app_date] => 2013-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4784 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14096271 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9520394 [patent_doc_number] => 20140156886 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-05 [patent_title] => 'DATA MIGRATION METHOD AND APPARATUS' [patent_app_type] => utility [patent_app_number] => 14/093128 [patent_app_country] => US [patent_app_date] => 2013-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7164 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14093128 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11482386 [patent_doc_number] => 09588933 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-07 [patent_title] => 'Single wire serial interface master module and method thereof for sampling data information' [patent_app_type] => utility [patent_app_number] => 14/089401 [patent_app_country] => US [patent_app_date] => 2013-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4365 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14089401 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9555537 [patent_doc_number] => 08762608 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-06-24 [patent_title] => 'System on a chip serial communication interface method and apparatus' [patent_app_type] => utility [patent_app_number] => 14/072620 [patent_app_country] => US [patent_app_date] => 2013-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5276 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14072620 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11207643 [patent_doc_number] => 09437271 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-06 [patent_title] => 'Electronic devices having semiconductor magnetic memory units' [patent_app_type] => utility [patent_app_number] => 14/058079 [patent_app_country] => US [patent_app_date] => 2013-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 24398 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14058079 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10575980 [patent_doc_number] => 09298626 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-29 [patent_title] => 'Managing high-conflict cache lines in transactional memory computing environments' [patent_app_type] => utility [patent_app_number] => 14/037879 [patent_app_country] => US [patent_app_date] => 2013-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 29032 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14037879 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10517572 [patent_doc_number] => 09244619 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-26 [patent_title] => 'Method of managing data storage device and data storage device' [patent_app_type] => utility [patent_app_number] => 14/037676 [patent_app_country] => US [patent_app_date] => 2013-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 9788 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14037676 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10575977 [patent_doc_number] => 09298623 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-29 [patent_title] => 'Identifying high-conflict cache lines in transactional memory computing environments' [patent_app_type] => utility [patent_app_number] => 14/037901 [patent_app_country] => US [patent_app_date] => 2013-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 28986 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14037901 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10204320 [patent_doc_number] => 20150089308 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-26 [patent_title] => 'KEYBOARD, VIDEO AND MOUSE SWITCH IDENTIFYING AND DISPLAYING NODES EXPERIENCING A PROBLEM' [patent_app_type] => utility [patent_app_number] => 14/037649 [patent_app_country] => US [patent_app_date] => 2013-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3233 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14037649 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10609859 [patent_doc_number] => 09329890 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-03 [patent_title] => 'Managing high-coherence-miss cache lines in multi-processor computing environments' [patent_app_type] => utility [patent_app_number] => 14/037925 [patent_app_country] => US [patent_app_date] => 2013-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 28950 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14037925 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10569275 [patent_doc_number] => 09292444 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-22 [patent_title] => 'Multi-granular cache management in multi-processor computing environments' [patent_app_type] => utility [patent_app_number] => 14/037940 [patent_app_country] => US [patent_app_date] => 2013-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 29105 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 328 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14037940 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9270928 [patent_doc_number] => 20140025846 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-23 [patent_title] => 'INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING SYSTEM, AND COMMUNICATION CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 14/035208 [patent_app_country] => US [patent_app_date] => 2013-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8583 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14035208 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9207471 [patent_doc_number] => 20140006648 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-02 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/019807 [patent_app_country] => US [patent_app_date] => 2013-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4637 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14019807 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10816267 [patent_doc_number] => 20160162428 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-09 [patent_title] => 'Operation of a Switch in Linear Mode' [patent_app_type] => utility [patent_app_number] => 14/897991 [patent_app_country] => US [patent_app_date] => 2013-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5664 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14897991 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9264715 [patent_doc_number] => 20130346644 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-26 [patent_title] => 'System And Method For Effectively Implementing An Electronic Image Hub Device' [patent_app_type] => utility [patent_app_number] => 13/975339 [patent_app_country] => US [patent_app_date] => 2013-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5718 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13975339 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13865603 [patent_doc_number] => 10194549 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-29 [patent_title] => Accessory apparatus, system, and method for supporting hierarchical connection [patent_app_type] => utility [patent_app_number] => 13/961317 [patent_app_country] => US [patent_app_date] => 2013-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11976 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13961317 [rel_patent_id] =>[rel_patent_doc_number] =>)