Search

Aurangzeb Hassan

Examiner (ID: 12030)

Most Active Art Unit
2184
Art Unit(s)
2182, 2184
Total Applications
875
Issued Applications
640
Pending Applications
71
Abandoned Applications
181

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17947973 [patent_doc_number] => 20220334992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => TECHNIQUES FOR LOAD BALANCING WITH A HUB DEVICE AND MULTIPLE ENDPOINTS [patent_app_type] => utility [patent_app_number] => 17/718984 [patent_app_country] => US [patent_app_date] => 2022-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16341 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17718984 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/718984
Techniques for load balancing with a hub device and multiple endpoints Apr 11, 2022 Issued
Array ( [id] => 17751590 [patent_doc_number] => 20220229795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-21 [patent_title] => LOW LATENCY AND HIGHLY PROGRAMMABLE INTERRUPT CONTROLLER UNIT [patent_app_type] => utility [patent_app_number] => 17/711209 [patent_app_country] => US [patent_app_date] => 2022-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19130 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17711209 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/711209
Low latency and highly programmable interrupt controller unit Mar 31, 2022 Issued
Array ( [id] => 18659970 [patent_doc_number] => 20230305977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => SMART NETWORK INTERFACE CONTROLLER (SMARTNIC) STORAGE NON-DISRUPTIVE UPDATE [patent_app_type] => utility [patent_app_number] => 17/703919 [patent_app_country] => US [patent_app_date] => 2022-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6673 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17703919 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/703919
Smart network interface controller (SmartNIC) storage non-disruptive update Mar 23, 2022 Issued
Array ( [id] => 19780035 [patent_doc_number] => 12229068 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-02-18 [patent_title] => Multi-destination DMA for packet broadcast [patent_app_type] => utility [patent_app_number] => 17/696201 [patent_app_country] => US [patent_app_date] => 2022-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 16418 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17696201 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/696201
Multi-destination DMA for packet broadcast Mar 15, 2022 Issued
Array ( [id] => 20537586 [patent_doc_number] => 12554663 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-17 [patent_title] => Host controller and bus-attached peripheral device power consumption reduction [patent_app_type] => utility [patent_app_number] => 17/682527 [patent_app_country] => US [patent_app_date] => 2022-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 0 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17682527 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/682527
Host controller and bus-attached peripheral device power consumption reduction Feb 27, 2022 Issued
Array ( [id] => 18750034 [patent_doc_number] => 11809345 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-07 [patent_title] => Data-buffer component with variable-width data ranks and configurable data-rank timing [patent_app_type] => utility [patent_app_number] => 17/677714 [patent_app_country] => US [patent_app_date] => 2022-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6885 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17677714 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/677714
Data-buffer component with variable-width data ranks and configurable data-rank timing Feb 21, 2022 Issued
Array ( [id] => 18279321 [patent_doc_number] => 20230094793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => Video Input Connector [patent_app_type] => utility [patent_app_number] => 17/676446 [patent_app_country] => US [patent_app_date] => 2022-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6220 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17676446 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/676446
Video Input Connector Feb 20, 2022 Abandoned
Array ( [id] => 17832327 [patent_doc_number] => 20220269631 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => METHOD FOR OPERATING A COMMUNICATIONS NETWORK, COMMUNICATIONS NETWORK, AND USERS FOR SAME [patent_app_type] => utility [patent_app_number] => 17/674145 [patent_app_country] => US [patent_app_date] => 2022-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5603 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17674145 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/674145
Method for operating a communications network, communications network, and users for same Feb 16, 2022 Issued
Array ( [id] => 18527829 [patent_doc_number] => 11714822 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-01 [patent_title] => Method and system for adapting programs for interoperability and adapters therefor [patent_app_type] => utility [patent_app_number] => 17/651403 [patent_app_country] => US [patent_app_date] => 2022-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6794 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17651403 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/651403
Method and system for adapting programs for interoperability and adapters therefor Feb 15, 2022 Issued
Array ( [id] => 19087111 [patent_doc_number] => 20240113912 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => Method and System For Identifying a Manipulated Control Device of a Bus System [patent_app_type] => utility [patent_app_number] => 18/554327 [patent_app_country] => US [patent_app_date] => 2022-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2349 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18554327 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/554327
Method and system for identifying a manipulated control device of a bus system Feb 14, 2022 Issued
Array ( [id] => 19212304 [patent_doc_number] => 12001366 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-04 [patent_title] => Interchangeable computing nodes [patent_app_type] => utility [patent_app_number] => 17/665250 [patent_app_country] => US [patent_app_date] => 2022-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 23 [patent_no_of_words] => 4381 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17665250 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/665250
Interchangeable computing nodes Feb 3, 2022 Issued
Array ( [id] => 18577686 [patent_doc_number] => 11734218 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-22 [patent_title] => Bus system [patent_app_type] => utility [patent_app_number] => 17/581075 [patent_app_country] => US [patent_app_date] => 2022-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7073 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17581075 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/581075
Bus system Jan 20, 2022 Issued
Array ( [id] => 18060249 [patent_doc_number] => 20220391335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-08 [patent_title] => Interface Module with Low-Latency Communication of Electrical Signals Between Power Domains [patent_app_type] => utility [patent_app_number] => 17/576702 [patent_app_country] => US [patent_app_date] => 2022-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3787 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17576702 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/576702
Interface module with low-latency communication of electrical signals between power domains Jan 13, 2022 Issued
Array ( [id] => 19849026 [patent_doc_number] => 20250094377 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => DEVICE, ESPECIALLY INPUT DEVICE, AND METHOD FOR CHANGING THE CONTROLLING UNIT FOR DATA TRANSMISSION [patent_app_type] => utility [patent_app_number] => 18/727900 [patent_app_country] => US [patent_app_date] => 2022-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10108 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18727900 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/727900
DEVICE, ESPECIALLY INPUT DEVICE, AND METHOD FOR CHANGING THE CONTROLLING UNIT FOR DATA TRANSMISSION Jan 9, 2022 Pending
Array ( [id] => 17764546 [patent_doc_number] => 20220238159 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-28 [patent_title] => DYNAMIC MEMORY RANK CONFIGURATION [patent_app_type] => utility [patent_app_number] => 17/567401 [patent_app_country] => US [patent_app_date] => 2022-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 43327 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17567401 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/567401
Self-annealing data storage system Jan 2, 2022 Issued
Array ( [id] => 17549914 [patent_doc_number] => 20220121256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-21 [patent_title] => SERIES CIRCUIT AND COMPUTING DEVICE [patent_app_type] => utility [patent_app_number] => 17/563898 [patent_app_country] => US [patent_app_date] => 2021-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4421 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -28 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17563898 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/563898
Series circuit and computing device Dec 27, 2021 Issued
Array ( [id] => 19107312 [patent_doc_number] => 11960416 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-16 [patent_title] => Multichannel memory arbitration and interleaving scheme [patent_app_type] => utility [patent_app_number] => 17/558278 [patent_app_country] => US [patent_app_date] => 2021-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7040 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17558278 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/558278
Multichannel memory arbitration and interleaving scheme Dec 20, 2021 Issued
Array ( [id] => 19617577 [patent_doc_number] => 20240403257 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => DYNAMIC DISPLAY SERIAL INTERFACE PHYSICAL LAYER INTERFACE CONFIGURATION CHANGE [patent_app_type] => utility [patent_app_number] => 18/697792 [patent_app_country] => US [patent_app_date] => 2021-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16607 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18697792 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/697792
Dynamic display serial interface physical layer interface configuration change Dec 14, 2021 Issued
Array ( [id] => 17522055 [patent_doc_number] => 20220107904 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-07 [patent_title] => SYSTEM BUS TRANSACTION QUEUE REALLOCATION [patent_app_type] => utility [patent_app_number] => 17/644130 [patent_app_country] => US [patent_app_date] => 2021-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5819 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17644130 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/644130
System bus transaction queue reallocation Dec 13, 2021 Issued
Array ( [id] => 18441151 [patent_doc_number] => 20230188447 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => NETWORK PROCESSOR WITH EXTERNAL MEMORY PROTECTION [patent_app_type] => utility [patent_app_number] => 17/548438 [patent_app_country] => US [patent_app_date] => 2021-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8003 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17548438 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/548438
Network processor with external memory protection Dec 9, 2021 Issued
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