Austin Murata

Array ( [id] => 16974334 [patent_doc_number] => 11070319 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-20 [patent_title] => Method and device for transmitting building services data [patent_app_type] => utility [patent_app_number] => 16/413691 [patent_app_country] => US [patent_app_date] => 2019-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3510 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16413691 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14786247 [patent_doc_number] => 20190268021 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-29 [patent_title] => METHOD AND APPARATUS FOR ENCODING AND DECODING OF VARIABLE LENGTH QUASI-CYCLIC LOW-DENSITY PARITY-CHECK, QC-LDPC, CODES [patent_app_type] => utility [patent_app_number] => 16/411268 [patent_app_country] => US [patent_app_date] => 2019-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4682 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16411268 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16363218 [patent_doc_number] => 20200319969 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-08 [patent_title] => METHOD FOR CHECKING ADDRESS AND CONTROL SIGNAL INTEGRITY IN FUNCTIONAL SAFETY APPLICATIONS, RELATED PRODUCTS [patent_app_type] => utility [patent_app_number] => 16/409739 [patent_app_country] => US [patent_app_date] => 2019-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7475 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16409739 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17469035 [patent_doc_number] => 11275512 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-15 [patent_title] => Asynchronous power loss impacted data structure [patent_app_type] => utility [patent_app_number] => 16/406627 [patent_app_country] => US [patent_app_date] => 2019-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 13685 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 317 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16406627 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18644663 [patent_doc_number] => 11768731 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-26 [patent_title] => System and method for transparent register data error detection and correction via a communication bus [patent_app_type] => utility [patent_app_number] => 16/402532 [patent_app_country] => US [patent_app_date] => 2019-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 6832 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16402532 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14754691 [patent_doc_number] => 20190260519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => INFORMATION TRANSMISSION METHOD AND RELATED APPARATUS [patent_app_type] => utility [patent_app_number] => 16/401699 [patent_app_country] => US [patent_app_date] => 2019-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17542 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16401699 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16565257 [patent_doc_number] => 10890622 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-12 [patent_title] => Integrated circuit control latch protection [patent_app_type] => utility [patent_app_number] => 16/397107 [patent_app_country] => US [patent_app_date] => 2019-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5685 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16397107 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15045187 [patent_doc_number] => 20190333598 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => SEMICONDUCTOR DEVICE, MEMORY TEST METHOD FOR SEMICONDUCTOR DEVICE, AND TEST PATTERN GENERATION PROGRAM [patent_app_type] => utility [patent_app_number] => 16/378056 [patent_app_country] => US [patent_app_date] => 2019-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12064 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16378056 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16173594 [patent_doc_number] => 10715180 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-07-14 [patent_title] => Circuit for error correction and method of same [patent_app_type] => utility [patent_app_number] => 16/377907 [patent_app_country] => US [patent_app_date] => 2019-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9188 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 328 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16377907 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18608736 [patent_doc_number] => 11750223 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Low-power block code forward error correction decoder [patent_app_type] => utility [patent_app_number] => 16/367538 [patent_app_country] => US [patent_app_date] => 2019-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 3901 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16367538 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15520785 [patent_doc_number] => 10567000 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-18 [patent_title] => Transmitter and parity permutation method thereof [patent_app_type] => utility [patent_app_number] => 16/361805 [patent_app_country] => US [patent_app_date] => 2019-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 31700 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 370 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16361805 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17557211 [patent_doc_number] => 11313906 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-26 [patent_title] => Auto-calibration circuit for pulse generating circuit used in resonating circuits [patent_app_type] => utility [patent_app_number] => 16/982566 [patent_app_country] => US [patent_app_date] => 2019-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2714 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16982566 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16896085 [patent_doc_number] => 11037646 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-15 [patent_title] => Memory controller, operating method of memory controller and memory system [patent_app_type] => utility [patent_app_number] => 16/357431 [patent_app_country] => US [patent_app_date] => 2019-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 10922 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16357431 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16314661 [patent_doc_number] => 20200293399 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-17 [patent_title] => DECODING SCHEME FOR ERROR CORRECTION CODE STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/355555 [patent_app_country] => US [patent_app_date] => 2019-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13434 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16355555 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16747205 [patent_doc_number] => 10972215 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-06 [patent_title] => Methods and apparatus for joint use of probabilistic signal shaping and forward error correction [patent_app_type] => utility [patent_app_number] => 16/295089 [patent_app_country] => US [patent_app_date] => 2019-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 21 [patent_no_of_words] => 10014 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16295089 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16300852 [patent_doc_number] => 20200286575 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-10 [patent_title] => Apparatus and Method for Testing Storage Device in Power Interruptions [patent_app_type] => utility [patent_app_number] => 16/294187 [patent_app_country] => US [patent_app_date] => 2019-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2839 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16294187 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16294333 [patent_doc_number] => 10771191 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-08 [patent_title] => System for highly reliable file delivery of using continuous FEC encoding/decoding [patent_app_type] => utility [patent_app_number] => 16/294179 [patent_app_country] => US [patent_app_date] => 2019-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 6222 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 322 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16294179 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16897057 [patent_doc_number] => 11038622 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-15 [patent_title] => FM system modes for HD radio [patent_app_type] => utility [patent_app_number] => 16/277598 [patent_app_country] => US [patent_app_date] => 2019-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 28 [patent_no_of_words] => 14845 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16277598 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14724267 [patent_doc_number] => 20190253197 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-15 [patent_title] => Control Element Trigger [patent_app_type] => utility [patent_app_number] => 16/277581 [patent_app_country] => US [patent_app_date] => 2019-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 29366 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16277581 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15458797 [patent_doc_number] => 20200042223 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-06 [patent_title] => SYSTEM AND METHOD FOR FACILITATING A HIGH-DENSITY STORAGE DEVICE WITH IMPROVED PERFORMANCE AND ENDURANCE [patent_app_type] => utility [patent_app_number] => 16/277686 [patent_app_country] => US [patent_app_date] => 2019-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7190 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16277686 [rel_patent_id] =>[rel_patent_doc_number] =>)