Search

Austin Murata

Examiner (ID: 10394, Phone: (571)270-5596 , Office: P/1712 )

Most Active Art Unit
1712
Art Unit(s)
1712, 1792
Total Applications
853
Issued Applications
467
Pending Applications
93
Abandoned Applications
315

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15301525 [patent_doc_number] => 20190393898 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => TRANSMITTING APPARATUS AND TRANSMISSION METHOD, RECEIVING APPARATUS AND RECEPTION METHOD, AND PROGRAM [patent_app_type] => utility [patent_app_number] => 16/474568 [patent_app_country] => US [patent_app_date] => 2018-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19056 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16474568 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/474568
Transmitting apparatus and transmission method, receiving apparatus and reception method, and program Feb 26, 2018 Issued
Array ( [id] => 16700619 [patent_doc_number] => 10951239 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-16 [patent_title] => Performing a decoding operation to simulate switching a bit of an identified set of bits of a data block [patent_app_type] => utility [patent_app_number] => 15/900562 [patent_app_country] => US [patent_app_date] => 2018-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 8093 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15900562 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/900562
Performing a decoding operation to simulate switching a bit of an identified set of bits of a data block Feb 19, 2018 Issued
Array ( [id] => 15077241 [patent_doc_number] => 10468115 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-05 [patent_title] => Processor and control method of processor [patent_app_type] => utility [patent_app_number] => 15/897242 [patent_app_country] => US [patent_app_date] => 2018-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 7006 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 296 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15897242 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/897242
Processor and control method of processor Feb 14, 2018 Issued
Array ( [id] => 12848326 [patent_doc_number] => 20180174615 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-21 [patent_title] => STORAGE DEVICE AND A METHOD FOR DEFECT SCANNING OF THE SAME [patent_app_type] => utility [patent_app_number] => 15/898155 [patent_app_country] => US [patent_app_date] => 2018-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6984 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15898155 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/898155
STORAGE DEVICE AND A METHOD FOR DEFECT SCANNING OF THE SAME Feb 14, 2018 Abandoned
Array ( [id] => 13875859 [patent_doc_number] => 20190034270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-31 [patent_title] => MEMORY SYSTEM HAVING AN ERROR CORRECTION FUNCTION AND OPERATING METHOD OF MEMORY MODULE AND MEMORY CONTROLLER [patent_app_type] => utility [patent_app_number] => 15/889741 [patent_app_country] => US [patent_app_date] => 2018-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11152 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15889741 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/889741
MEMORY SYSTEM HAVING AN ERROR CORRECTION FUNCTION AND OPERATING METHOD OF MEMORY MODULE AND MEMORY CONTROLLER Feb 5, 2018 Abandoned
Array ( [id] => 15875463 [patent_doc_number] => 20200145135 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-07 [patent_title] => TRANSMISSION METHOD AND RECEPTION DEVICE [patent_app_type] => utility [patent_app_number] => 16/473418 [patent_app_country] => US [patent_app_date] => 2018-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 62842 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 1049 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16473418 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/473418
Transmission method and reception device Jan 22, 2018 Issued
Array ( [id] => 13394225 [patent_doc_number] => 20180248655 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-30 [patent_title] => Method to Generate Ordered Sequence for Polar Codes [patent_app_type] => utility [patent_app_number] => 15/875766 [patent_app_country] => US [patent_app_date] => 2018-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26203 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15875766 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/875766
Method to generate ordered sequence for polar codes Jan 18, 2018 Issued
Array ( [id] => 13394225 [patent_doc_number] => 20180248655 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-30 [patent_title] => Method to Generate Ordered Sequence for Polar Codes [patent_app_type] => utility [patent_app_number] => 15/875766 [patent_app_country] => US [patent_app_date] => 2018-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26203 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15875766 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/875766
Method to generate ordered sequence for polar codes Jan 18, 2018 Issued
Array ( [id] => 13394225 [patent_doc_number] => 20180248655 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-30 [patent_title] => Method to Generate Ordered Sequence for Polar Codes [patent_app_type] => utility [patent_app_number] => 15/875766 [patent_app_country] => US [patent_app_date] => 2018-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26203 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15875766 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/875766
Method to generate ordered sequence for polar codes Jan 18, 2018 Issued
Array ( [id] => 13394225 [patent_doc_number] => 20180248655 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-30 [patent_title] => Method to Generate Ordered Sequence for Polar Codes [patent_app_type] => utility [patent_app_number] => 15/875766 [patent_app_country] => US [patent_app_date] => 2018-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26203 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15875766 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/875766
Method to generate ordered sequence for polar codes Jan 18, 2018 Issued
Array ( [id] => 15124883 [patent_doc_number] => 20190349075 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-14 [patent_title] => METHOD FOR PROTECTION OF SIGNAL BLOCKAGES IN A SATELLITE MOBILE BROADCAST SYSTEM [patent_app_type] => utility [patent_app_number] => 16/474932 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6287 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16474932 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/474932
Method for protection of signal blockages in a satellite mobile broadcast system Dec 28, 2017 Issued
Array ( [id] => 15001375 [patent_doc_number] => 20190319645 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-17 [patent_title] => METHOD AND DEVICE FOR CORRECTING LOW-LATENCY ERRORS FOR RETRIEVING DATA PACKETS [patent_app_type] => utility [patent_app_number] => 16/471901 [patent_app_country] => US [patent_app_date] => 2017-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8496 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16471901 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/471901
METHOD AND DEVICE FOR CORRECTING LOW-LATENCY ERRORS FOR RETRIEVING DATA PACKETS Dec 20, 2017 Abandoned
Array ( [id] => 15042937 [patent_doc_number] => 20190332473 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => DYNAMIC ERASURE CODING [patent_app_type] => utility [patent_app_number] => 15/833962 [patent_app_country] => US [patent_app_date] => 2017-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14771 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15833962 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/833962
Dynamic erasure coding Dec 5, 2017 Issued
Array ( [id] => 16846701 [patent_doc_number] => 11018810 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-25 [patent_title] => Adaptive multiple HARQ entity design [patent_app_type] => utility [patent_app_number] => 16/473268 [patent_app_country] => US [patent_app_date] => 2017-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 5375 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16473268 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/473268
Adaptive multiple HARQ entity design Dec 3, 2017 Issued
Array ( [id] => 15674407 [patent_doc_number] => 10601448 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-24 [patent_title] => Reduced latency error correction decoding [patent_app_type] => utility [patent_app_number] => 15/830526 [patent_app_country] => US [patent_app_date] => 2017-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11270 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15830526 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/830526
Reduced latency error correction decoding Dec 3, 2017 Issued
Array ( [id] => 12718684 [patent_doc_number] => 20180131394 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-10 [patent_title] => DATA PROCESSING SYSTEM AND DATA PROCESSING APPARATUS [patent_app_type] => utility [patent_app_number] => 15/797531 [patent_app_country] => US [patent_app_date] => 2017-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11659 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15797531 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/797531
DATA PROCESSING SYSTEM AND DATA PROCESSING APPARATUS Oct 29, 2017 Abandoned
Array ( [id] => 12160367 [patent_doc_number] => 20180031634 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-01 [patent_title] => 'CIRCUIT AND METHOD FOR DIAGNOSING SCAN CHAIN FAILURES' [patent_app_type] => utility [patent_app_number] => 15/730411 [patent_app_country] => US [patent_app_date] => 2017-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6761 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15730411 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/730411
Circuit and method for diagnosing scan chain failures Oct 10, 2017 Issued
Array ( [id] => 12670675 [patent_doc_number] => 20180115391 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-26 [patent_title] => TRANSMITTING/RECEIVING SYSTEM AND BROADCAST SIGNAL PROCESSING METHOD [patent_app_type] => utility [patent_app_number] => 15/719396 [patent_app_country] => US [patent_app_date] => 2017-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 45151 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15719396 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/719396
Transmitting/receiving system and broadcast signal processing method Sep 27, 2017 Issued
Array ( [id] => 12129862 [patent_doc_number] => 20180013448 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-11 [patent_title] => 'BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 16200 AND CODE RATE OF 4/15 AND 64-SYMBOL MAPPING, AND BIT INTERLEAVING METHOD USING SAME' [patent_app_type] => utility [patent_app_number] => 15/703842 [patent_app_country] => US [patent_app_date] => 2017-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6102 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15703842 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/703842
Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 4/15 and 64-symbol mapping, and bit interleaving method using same Sep 12, 2017 Issued
Array ( [id] => 12141681 [patent_doc_number] => 20180019764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-18 [patent_title] => 'BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 16200 AND CODE RATE OF 2/15 AND 64-SYMBOL MAPPING, AND BIT INTERLEAVING METHOD USING SAME' [patent_app_type] => utility [patent_app_number] => 15/703822 [patent_app_country] => US [patent_app_date] => 2017-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6020 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15703822 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/703822
Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 2/15 and 64-symbol mapping, and bit interleaving method using same Sep 12, 2017 Issued
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