Search

Austin Murata

Examiner (ID: 10394, Phone: (571)270-5596 , Office: P/1712 )

Most Active Art Unit
1712
Art Unit(s)
1712, 1792
Total Applications
853
Issued Applications
467
Pending Applications
93
Abandoned Applications
315

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12242031 [patent_doc_number] => 20180074895 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-15 [patent_title] => 'SEMICONDUCTOR DEVICE, SEMICONDUCTOR SYSTEM, AND METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/480798 [patent_app_country] => US [patent_app_date] => 2017-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10331 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15480798 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/480798
Semiconductor device, semiconductor system, and method thereof Apr 5, 2017 Issued
Array ( [id] => 15859077 [patent_doc_number] => 10644844 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-05-05 [patent_title] => Circuit for and method of determining error spacing in an input signal [patent_app_type] => utility [patent_app_number] => 15/480207 [patent_app_country] => US [patent_app_date] => 2017-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 6226 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15480207 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/480207
Circuit for and method of determining error spacing in an input signal Apr 4, 2017 Issued
Array ( [id] => 14179229 [patent_doc_number] => 10263640 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-16 [patent_title] => Low density parity check (LDPC) decoder with pre-saturation compensation [patent_app_type] => utility [patent_app_number] => 15/478895 [patent_app_country] => US [patent_app_date] => 2017-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 6241 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15478895 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/478895
Low density parity check (LDPC) decoder with pre-saturation compensation Apr 3, 2017 Issued
Array ( [id] => 14770827 [patent_doc_number] => 10396826 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-27 [patent_title] => Software defined network with selectable low latency or high throughput mode [patent_app_type] => utility [patent_app_number] => 15/478798 [patent_app_country] => US [patent_app_date] => 2017-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 5154 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 347 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15478798 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/478798
Software defined network with selectable low latency or high throughput mode Apr 3, 2017 Issued
Array ( [id] => 14175387 [patent_doc_number] => 10261707 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-04-16 [patent_title] => Decoder memory sharing [patent_app_type] => utility [patent_app_number] => 15/467839 [patent_app_country] => US [patent_app_date] => 2017-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 7707 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15467839 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/467839
Decoder memory sharing Mar 22, 2017 Issued
Array ( [id] => 12235880 [patent_doc_number] => 20180068743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-08 [patent_title] => 'TEST METHODS OF SEMICONDUCTOR DEVICES AND SEMICONDUCTOR SYSTEMS USED THEREIN' [patent_app_type] => utility [patent_app_number] => 15/467373 [patent_app_country] => US [patent_app_date] => 2017-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7540 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15467373 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/467373
Test methods of semiconductor devices and semiconductor systems used therein Mar 22, 2017 Issued
Array ( [id] => 13268747 [patent_doc_number] => 10146458 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-04 [patent_title] => Proxying read requests when performance or availability failure is anticipated [patent_app_type] => utility [patent_app_number] => 15/467256 [patent_app_country] => US [patent_app_date] => 2017-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 6749 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15467256 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/467256
Proxying read requests when performance or availability failure is anticipated Mar 22, 2017 Issued
Array ( [id] => 13451385 [patent_doc_number] => 20180277235 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-27 [patent_title] => AUTOMATED SEMICONDUCTOR PLATFORM TESTING [patent_app_type] => utility [patent_app_number] => 15/467532 [patent_app_country] => US [patent_app_date] => 2017-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14735 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15467532 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/467532
Automated semiconductor platform testing Mar 22, 2017 Issued
Array ( [id] => 13159223 [patent_doc_number] => 10096345 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-09 [patent_title] => Semiconductor devices [patent_app_type] => utility [patent_app_number] => 15/467360 [patent_app_country] => US [patent_app_date] => 2017-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7299 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15467360 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/467360
Semiconductor devices Mar 22, 2017 Issued
Array ( [id] => 14174247 [patent_doc_number] => 10261128 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-16 [patent_title] => Test circuit capable of measuring PLL clock signal in ATPG mode [patent_app_type] => utility [patent_app_number] => 15/466001 [patent_app_country] => US [patent_app_date] => 2017-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4156 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15466001 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/466001
Test circuit capable of measuring PLL clock signal in ATPG mode Mar 21, 2017 Issued
Array ( [id] => 11966875 [patent_doc_number] => 20170271028 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-21 [patent_title] => 'METHOD FOR TESTING PERFORMANCE OF A STORAGE DEVICE AND CORRESPONDING DEVICE' [patent_app_type] => utility [patent_app_number] => 15/464974 [patent_app_country] => US [patent_app_date] => 2017-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5924 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15464974 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/464974
METHOD FOR TESTING PERFORMANCE OF A STORAGE DEVICE AND CORRESPONDING DEVICE Mar 20, 2017 Abandoned
Array ( [id] => 13095705 [patent_doc_number] => 10067189 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-09-04 [patent_title] => Input/output path testing and characterization using scan chains [patent_app_type] => utility [patent_app_number] => 15/464217 [patent_app_country] => US [patent_app_date] => 2017-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6257 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15464217 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/464217
Input/output path testing and characterization using scan chains Mar 19, 2017 Issued
Array ( [id] => 13069073 [patent_doc_number] => 10055316 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-21 [patent_title] => Row driver fault isolation circuitry for matrix type integrated circuit [patent_app_type] => utility [patent_app_number] => 15/418721 [patent_app_country] => US [patent_app_date] => 2017-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8129 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15418721 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/418721
Row driver fault isolation circuitry for matrix type integrated circuit Jan 27, 2017 Issued
Array ( [id] => 14645549 [patent_doc_number] => 10367529 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-30 [patent_title] => List decode circuits [patent_app_type] => utility [patent_app_number] => 15/417431 [patent_app_country] => US [patent_app_date] => 2017-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5926 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15417431 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/417431
List decode circuits Jan 26, 2017 Issued
Array ( [id] => 13226597 [patent_doc_number] => 10127074 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-13 [patent_title] => Transaction identification synchronization [patent_app_type] => utility [patent_app_number] => 15/417984 [patent_app_country] => US [patent_app_date] => 2017-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 26 [patent_no_of_words] => 15025 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15417984 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/417984
Transaction identification synchronization Jan 26, 2017 Issued
Array ( [id] => 13332709 [patent_doc_number] => 20180217892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-02 [patent_title] => SYSTEM AND METHOD FOR IMPLEMENTING SUPER WORD LINE ZONES IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 15/418455 [patent_app_country] => US [patent_app_date] => 2017-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13215 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15418455 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/418455
System and method for implementing super word line zones in a memory device Jan 26, 2017 Issued
Array ( [id] => 14125035 [patent_doc_number] => 10249380 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-02 [patent_title] => Embedded memory testing with storage borrowing [patent_app_type] => utility [patent_app_number] => 15/418543 [patent_app_country] => US [patent_app_date] => 2017-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11242 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15418543 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/418543
Embedded memory testing with storage borrowing Jan 26, 2017 Issued
Array ( [id] => 15520791 [patent_doc_number] => 10567003 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-18 [patent_title] => List decode circuits [patent_app_type] => utility [patent_app_number] => 15/416395 [patent_app_country] => US [patent_app_date] => 2017-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6386 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15416395 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/416395
List decode circuits Jan 25, 2017 Issued
Array ( [id] => 15375411 [patent_doc_number] => 10529432 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-07 [patent_title] => Data storage device including read voltage search unit [patent_app_type] => utility [patent_app_number] => 15/415011 [patent_app_country] => US [patent_app_date] => 2017-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 22 [patent_no_of_words] => 8603 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15415011 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/415011
Data storage device including read voltage search unit Jan 24, 2017 Issued
Array ( [id] => 13068723 [patent_doc_number] => 10055141 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-21 [patent_title] => Storage device, liquid container, and host device [patent_app_type] => utility [patent_app_number] => 15/413583 [patent_app_country] => US [patent_app_date] => 2017-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 12990 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15413583 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/413583
Storage device, liquid container, and host device Jan 23, 2017 Issued
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