Search

Austin Murata

Examiner (ID: 10394, Phone: (571)270-5596 , Office: P/1712 )

Most Active Art Unit
1712
Art Unit(s)
1712, 1792
Total Applications
853
Issued Applications
467
Pending Applications
93
Abandoned Applications
315

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12141683 [patent_doc_number] => 20180019766 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-18 [patent_title] => 'PIPELINING FOR POLAR CODE LIST DECODING' [patent_app_type] => utility [patent_app_number] => 15/414548 [patent_app_country] => US [patent_app_date] => 2017-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 13650 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15414548 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/414548
PIPELINING FOR POLAR CODE LIST DECODING Jan 23, 2017 Abandoned
Array ( [id] => 14177467 [patent_doc_number] => 10262754 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-16 [patent_title] => Fine grained online remapping to handle memory errors [patent_app_type] => utility [patent_app_number] => 15/357842 [patent_app_country] => US [patent_app_date] => 2016-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7023 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15357842 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/357842
Fine grained online remapping to handle memory errors Nov 20, 2016 Issued
Array ( [id] => 13600303 [patent_doc_number] => 20180351700 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-06 [patent_title] => Convolutional code data sending method and apparatus [patent_app_type] => utility [patent_app_number] => 15/759792 [patent_app_country] => US [patent_app_date] => 2016-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11177 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15759792 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/759792
Convolutional code data sending method and apparatus Aug 28, 2016 Abandoned
Array ( [id] => 12161129 [patent_doc_number] => 20180032396 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-01 [patent_title] => 'GENERALIZED SYNDROME WEIGHTS' [patent_app_type] => utility [patent_app_number] => 15/223302 [patent_app_country] => US [patent_app_date] => 2016-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11778 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15223302 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/223302
GENERALIZED SYNDROME WEIGHTS Jul 28, 2016 Abandoned
Array ( [id] => 12160365 [patent_doc_number] => 20180031631 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-01 [patent_title] => 'LOGIC BUILT-IN SELF-TEST (LBIST) WITH PIPELINE SCAN ENABLE LAUNCH ON SHIFT (LOS) FLIP-FLOP CIRCUIT' [patent_app_type] => utility [patent_app_number] => 15/223061 [patent_app_country] => US [patent_app_date] => 2016-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6732 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15223061 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/223061
Logic built-in self-test (LBIST) with pipeline scan enable launch on shift (LOS) flip-flop circuit Jul 28, 2016 Issued
Array ( [id] => 15793371 [patent_doc_number] => 10630422 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-21 [patent_title] => Method and apparatus for channel encoding an channel decoding in a wireless communication system [patent_app_type] => utility [patent_app_number] => 15/223596 [patent_app_country] => US [patent_app_date] => 2016-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7438 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15223596 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/223596
Method and apparatus for channel encoding an channel decoding in a wireless communication system Jul 28, 2016 Issued
Array ( [id] => 12163211 [patent_doc_number] => 20180034477 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-01 [patent_title] => 'DECODER WITH PARALLEL DECODING PATHS' [patent_app_type] => utility [patent_app_number] => 15/223531 [patent_app_country] => US [patent_app_date] => 2016-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11472 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15223531 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/223531
Decoder with parallel decoding paths Jul 28, 2016 Issued
Array ( [id] => 12161131 [patent_doc_number] => 20180032397 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-01 [patent_title] => 'LAST WRITERS OF DATASETS IN STORAGE ARRAY ERRORS' [patent_app_type] => utility [patent_app_number] => 15/221728 [patent_app_country] => US [patent_app_date] => 2016-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 12210 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15221728 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/221728
Last writers of datasets in storage array errors Jul 27, 2016 Issued
Array ( [id] => 11607826 [patent_doc_number] => 20170125128 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-04 [patent_title] => 'NONVOLATILE MEMORY DEVICE AND A METHOD OF OPERATING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/207774 [patent_app_country] => US [patent_app_date] => 2016-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 11090 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15207774 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/207774
Nonvolatile memory device and a method of operating the same Jul 11, 2016 Issued
Array ( [id] => 12140140 [patent_doc_number] => 20180018223 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-18 [patent_title] => 'GENERATING PARITY FOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 15/208583 [patent_app_country] => US [patent_app_date] => 2016-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4026 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15208583 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/208583
Generating parity for storage device Jul 11, 2016 Issued
Array ( [id] => 15425793 [patent_doc_number] => 10545825 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-28 [patent_title] => Fault-tolerant enterprise object storage system for small objects [patent_app_type] => utility [patent_app_number] => 15/207895 [patent_app_country] => US [patent_app_date] => 2016-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 11898 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15207895 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/207895
Fault-tolerant enterprise object storage system for small objects Jul 11, 2016 Issued
Array ( [id] => 11651364 [patent_doc_number] => 20170147265 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-25 [patent_title] => 'Method of Compressing Parity Data Upon Writing' [patent_app_type] => utility [patent_app_number] => 15/208360 [patent_app_country] => US [patent_app_date] => 2016-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10573 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15208360 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/208360
Method of compressing parity data upon writing Jul 11, 2016 Issued
Array ( [id] => 11584118 [patent_doc_number] => 09638751 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-02 [patent_title] => 'Parallel test device and method' [patent_app_type] => utility [patent_app_number] => 15/207107 [patent_app_country] => US [patent_app_date] => 2016-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6672 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15207107 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/207107
Parallel test device and method Jul 10, 2016 Issued
Array ( [id] => 14460999 [patent_doc_number] => 10326479 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-18 [patent_title] => Apparatuses and methods for layer-by-layer error correction [patent_app_type] => utility [patent_app_number] => 15/206799 [patent_app_country] => US [patent_app_date] => 2016-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8298 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 479 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15206799 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/206799
Apparatuses and methods for layer-by-layer error correction Jul 10, 2016 Issued
Array ( [id] => 12128176 [patent_doc_number] => 20180011762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-11 [patent_title] => 'POOL-LEVEL SOLID STATE DRIVE ERROR CORRECTION' [patent_app_type] => utility [patent_app_number] => 15/205248 [patent_app_country] => US [patent_app_date] => 2016-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8789 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15205248 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/205248
Pool-level solid state drive error correction Jul 7, 2016 Issued
Array ( [id] => 12418785 [patent_doc_number] => 09973214 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-15 [patent_title] => Low density parity check decoding method performing on general graphic processing unit and decoding apparatus [patent_app_type] => utility [patent_app_number] => 15/203804 [patent_app_country] => US [patent_app_date] => 2016-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 5818 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15203804 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/203804
Low density parity check decoding method performing on general graphic processing unit and decoding apparatus Jul 6, 2016 Issued
Array ( [id] => 11570587 [patent_doc_number] => 20170109231 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-20 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICES AND MEMORY SYSTEMS INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/204536 [patent_app_country] => US [patent_app_date] => 2016-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 15422 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15204536 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/204536
Semiconductor memory devices and memory systems including the same Jul 6, 2016 Issued
Array ( [id] => 11716982 [patent_doc_number] => 20170185481 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-29 [patent_title] => 'COMPUTING SYSTEM WITH DATA RECOVERY MECHANISM AND METHOD OF OPERATION THEREOF' [patent_app_type] => utility [patent_app_number] => 15/204408 [patent_app_country] => US [patent_app_date] => 2016-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 17863 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15204408 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/204408
Computing system with data recovery mechanism and method of operation thereof Jul 6, 2016 Issued
Array ( [id] => 11064480 [patent_doc_number] => 20160261443 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-08 [patent_title] => 'METHOD FOR EFFICIENT PACKET FRAMING IN A COMMUNICATION NETWORK' [patent_app_type] => utility [patent_app_number] => 15/156389 [patent_app_country] => US [patent_app_date] => 2016-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7699 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15156389 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/156389
Method for efficient packet framing in a communication network May 16, 2016 Issued
Array ( [id] => 11551391 [patent_doc_number] => 09620244 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-04-11 [patent_title] => 'Determining categories for memory fail conditions' [patent_app_type] => utility [patent_app_number] => 15/150822 [patent_app_country] => US [patent_app_date] => 2016-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 14039 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15150822 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/150822
Determining categories for memory fail conditions May 9, 2016 Issued
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