
Austin Murata
Examiner (ID: 10394, Phone: (571)270-5596 , Office: P/1712 )
| Most Active Art Unit | 1712 |
| Art Unit(s) | 1712, 1792 |
| Total Applications | 853 |
| Issued Applications | 467 |
| Pending Applications | 93 |
| Abandoned Applications | 315 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 10172714
[patent_doc_number] => 09203432
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-12-01
[patent_title] => 'Symbol flipping decoders of non-binary low-density parity check (LDPC) codes'
[patent_app_type] => utility
[patent_app_number] => 13/974901
[patent_app_country] => US
[patent_app_date] => 2013-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 11036
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13974901
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/974901 | Symbol flipping decoders of non-binary low-density parity check (LDPC) codes | Aug 22, 2013 | Issued |
Array
(
[id] => 9903497
[patent_doc_number] => 20150058697
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-02-26
[patent_title] => 'STORAGE DEVICE, CONTROLLER AND MEMORY CONTROLLING METHOD'
[patent_app_type] => utility
[patent_app_number] => 13/973942
[patent_app_country] => US
[patent_app_date] => 2013-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 13588
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13973942
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/973942 | STORAGE DEVICE, CONTROLLER AND MEMORY CONTROLLING METHOD | Aug 21, 2013 | Abandoned |
Array
(
[id] => 10016720
[patent_doc_number] => 09059746
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-06-16
[patent_title] => 'Data sharing method, transmitter, receiver and data sharing system'
[patent_app_type] => utility
[patent_app_number] => 13/972113
[patent_app_country] => US
[patent_app_date] => 2013-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 4804
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13972113
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/972113 | Data sharing method, transmitter, receiver and data sharing system | Aug 20, 2013 | Issued |
Array
(
[id] => 9954440
[patent_doc_number] => 09003253
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-04-07
[patent_title] => 'Method for testing data packet signal transceiver using coordinated transmitted data packet signal power'
[patent_app_type] => utility
[patent_app_number] => 13/972280
[patent_app_country] => US
[patent_app_date] => 2013-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5095
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 220
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13972280
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/972280 | Method for testing data packet signal transceiver using coordinated transmitted data packet signal power | Aug 20, 2013 | Issued |
Array
(
[id] => 9903494
[patent_doc_number] => 20150058695
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-02-26
[patent_title] => 'CORRECTABLE CONFIGURATION DATA COMPRESSION AND DECOMPRESSION SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 13/972812
[patent_app_country] => US
[patent_app_date] => 2013-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 11036
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13972812
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/972812 | Correctable configuration data compression and decompression system | Aug 20, 2013 | Issued |
Array
(
[id] => 9332619
[patent_doc_number] => 20140059402
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-02-27
[patent_title] => 'METHOD AND APPARATUS FOR CONTROLLING THE DECODING OF CODEWORDS RECEIVED BY A LINEAR BLOCK CODE PIPELINED DECODER FROM AN INPUT BUFFER'
[patent_app_type] => utility
[patent_app_number] => 13/972298
[patent_app_country] => US
[patent_app_date] => 2013-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5472
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13972298
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/972298 | Method and apparatus for controlling the decoding of codewords received by a linear block code pipelined decoder from an input buffer | Aug 20, 2013 | Issued |
Array
(
[id] => 10100555
[patent_doc_number] => 09136877
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2015-09-15
[patent_title] => 'Syndrome layered decoding for LDPC codes'
[patent_app_type] => utility
[patent_app_number] => 13/971774
[patent_app_country] => US
[patent_app_date] => 2013-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 17
[patent_no_of_words] => 12470
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 393
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13971774
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/971774 | Syndrome layered decoding for LDPC codes | Aug 19, 2013 | Issued |
Array
(
[id] => 9897187
[patent_doc_number] => 20150052386
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-02-19
[patent_title] => 'TECHNIQUE FOR REPAIRING MEMORY MODULES IN DIFFERENT POWER REGIONS'
[patent_app_type] => utility
[patent_app_number] => 13/970485
[patent_app_country] => US
[patent_app_date] => 2013-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6538
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13970485
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/970485 | TECHNIQUE FOR REPAIRING MEMORY MODULES IN DIFFERENT POWER REGIONS | Aug 18, 2013 | Abandoned |
Array
(
[id] => 10537525
[patent_doc_number] => 09263158
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-02-16
[patent_title] => 'Determining data retention time in a solid-state non-volatile memory'
[patent_app_type] => utility
[patent_app_number] => 13/969049
[patent_app_country] => US
[patent_app_date] => 2013-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 14
[patent_no_of_words] => 6021
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13969049
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/969049 | Determining data retention time in a solid-state non-volatile memory | Aug 15, 2013 | Issued |
Array
(
[id] => 10003110
[patent_doc_number] => 09047205
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2015-06-02
[patent_title] => 'Data storage device employing orthogonal equalization and sequence detection to compensate for two-dimensional intersymbol interference'
[patent_app_type] => utility
[patent_app_number] => 13/968323
[patent_app_country] => US
[patent_app_date] => 2013-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 3038
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13968323
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/968323 | Data storage device employing orthogonal equalization and sequence detection to compensate for two-dimensional intersymbol interference | Aug 14, 2013 | Issued |
Array
(
[id] => 9897188
[patent_doc_number] => 20150052387
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-02-19
[patent_title] => 'SYSTEMS AND METHODS UTILIZING A FLEXIBLE READ REFERENCE FOR A DYNAMIC READ WINDOW'
[patent_app_type] => utility
[patent_app_number] => 13/966679
[patent_app_country] => US
[patent_app_date] => 2013-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4775
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13966679
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/966679 | Systems and methods utilizing a flexible read reference for a dynamic read window | Aug 13, 2013 | Issued |
Array
(
[id] => 9774484
[patent_doc_number] => 20140298147
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-10-02
[patent_title] => 'DATA TRANSFERRING SYSTEMS, DATA RECEIVERS AND METHODS OF TRANSFERRING DATA USING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/965674
[patent_app_country] => US
[patent_app_date] => 2013-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2139
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13965674
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/965674 | DATA TRANSFERRING SYSTEMS, DATA RECEIVERS AND METHODS OF TRANSFERRING DATA USING THE SAME | Aug 12, 2013 | Abandoned |
Array
(
[id] => 9866744
[patent_doc_number] => 20150046763
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-02-12
[patent_title] => 'Apparatus and Method for Controlling Internal Test Controllers'
[patent_app_type] => utility
[patent_app_number] => 13/964463
[patent_app_country] => US
[patent_app_date] => 2013-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2907
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13964463
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/964463 | Apparatus and Method for Controlling Internal Test Controllers | Aug 11, 2013 | Abandoned |
Array
(
[id] => 9486576
[patent_doc_number] => 08732539
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-05-20
[patent_title] => 'Test system having a sub-system to sub-system bridge'
[patent_app_type] => utility
[patent_app_number] => 13/874690
[patent_app_country] => US
[patent_app_date] => 2013-05-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4723
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13874690
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/874690 | Test system having a sub-system to sub-system bridge | Apr 30, 2013 | Issued |
Array
(
[id] => 9017421
[patent_doc_number] => 20130232385
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-09-05
[patent_title] => 'Latency Detection in a Memory Built-In Self-Test by Using a Ping Signal'
[patent_app_type] => utility
[patent_app_number] => 13/863965
[patent_app_country] => US
[patent_app_date] => 2013-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 8592
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13863965
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/863965 | Latency detection in a memory built-in self-test by using a ping signal | Apr 15, 2013 | Issued |
Array
(
[id] => 10139179
[patent_doc_number] => 09172507
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-10-27
[patent_title] => 'Signal protection'
[patent_app_type] => utility
[patent_app_number] => 13/855961
[patent_app_country] => US
[patent_app_date] => 2013-04-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 3222
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13855961
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/855961 | Signal protection | Apr 2, 2013 | Issued |
Array
(
[id] => 10557634
[patent_doc_number] => 09281843
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-03-08
[patent_title] => 'Systems and methods for reduced constraint code data processing'
[patent_app_type] => utility
[patent_app_number] => 13/853711
[patent_app_country] => US
[patent_app_date] => 2013-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 7810
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13853711
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/853711 | Systems and methods for reduced constraint code data processing | Mar 28, 2013 | Issued |
Array
(
[id] => 9820986
[patent_doc_number] => 08930789
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2015-01-06
[patent_title] => 'High-speed LDPC decoder'
[patent_app_type] => utility
[patent_app_number] => 13/835177
[patent_app_country] => US
[patent_app_date] => 2013-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 14901
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13835177
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/835177 | High-speed LDPC decoder | Mar 14, 2013 | Issued |
Array
(
[id] => 9156844
[patent_doc_number] => 08589758
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-11-19
[patent_title] => 'Method and system for cyclic redundancy check'
[patent_app_type] => utility
[patent_app_number] => 13/746561
[patent_app_country] => US
[patent_app_date] => 2013-01-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 8627
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 304
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13746561
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/746561 | Method and system for cyclic redundancy check | Jan 21, 2013 | Issued |
Array
(
[id] => 10538433
[patent_doc_number] => 09264072
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-02-16
[patent_title] => 'Encoding apparatus and communication apparatus'
[patent_app_type] => utility
[patent_app_number] => 13/727422
[patent_app_country] => US
[patent_app_date] => 2012-12-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 9817
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 473
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13727422
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/727422 | Encoding apparatus and communication apparatus | Dec 25, 2012 | Issued |