Search

Austin Murata

Examiner (ID: 10394, Phone: (571)270-5596 , Office: P/1712 )

Most Active Art Unit
1712
Art Unit(s)
1712, 1792
Total Applications
853
Issued Applications
467
Pending Applications
93
Abandoned Applications
315

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9036317 [patent_doc_number] => 20130238955 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-12 [patent_title] => 'SYSTEM AND METHOD TO DECODE DATA SUBJECT TO A DISTURB CONDITION' [patent_app_type] => utility [patent_app_number] => 13/416138 [patent_app_country] => US [patent_app_date] => 2012-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 9448 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13416138 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/416138
System and method to decode data subject to a disturb condition Mar 8, 2012 Issued
Array ( [id] => 9781396 [patent_doc_number] => 08856619 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-10-07 [patent_title] => 'Storing data across groups of storage nodes' [patent_app_type] => utility [patent_app_number] => 13/416119 [patent_app_country] => US [patent_app_date] => 2012-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6719 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13416119 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/416119
Storing data across groups of storage nodes Mar 8, 2012 Issued
Array ( [id] => 8337363 [patent_doc_number] => 20120204070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-09 [patent_title] => 'SEMICONDUCTOR MEMORY APPARATUS AND METHOD OF TESTING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/366467 [patent_app_country] => US [patent_app_date] => 2012-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4959 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13366467 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/366467
SEMICONDUCTOR MEMORY APPARATUS AND METHOD OF TESTING THE SAME Feb 5, 2012 Abandoned
Array ( [id] => 10847795 [patent_doc_number] => 08874995 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-28 [patent_title] => 'Partial-maximum distance separable (PMDS) erasure correcting codes for storage arrays' [patent_app_type] => utility [patent_app_number] => 13/364390 [patent_app_country] => US [patent_app_date] => 2012-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 14026 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13364390 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/364390
Partial-maximum distance separable (PMDS) erasure correcting codes for storage arrays Feb 1, 2012 Issued
Array ( [id] => 8407940 [patent_doc_number] => 20120240008 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-20 [patent_title] => 'ENCODER AND STORAGE APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/363667 [patent_app_country] => US [patent_app_date] => 2012-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6456 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13363667 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/363667
ENCODER AND STORAGE APPARATUS Jan 31, 2012 Abandoned
Array ( [id] => 8143533 [patent_doc_number] => 20120096307 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-19 [patent_title] => 'METHODS, APPARATUS, AND SYSTEMS TO REPAIR MEMORY' [patent_app_type] => utility [patent_app_number] => 13/332553 [patent_app_country] => US [patent_app_date] => 2011-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4549 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20120096307.pdf [firstpage_image] =>[orig_patent_app_number] => 13332553 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/332553
Methods, apparatus, and systems to repair memory Dec 20, 2011 Issued
Array ( [id] => 9431048 [patent_doc_number] => 08707133 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-22 [patent_title] => 'Method and apparatus to reduce a quantity of error detection/correction bits in memory coupled to a data-protected processor port' [patent_app_type] => utility [patent_app_number] => 13/311102 [patent_app_country] => US [patent_app_date] => 2011-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7425 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13311102 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/311102
Method and apparatus to reduce a quantity of error detection/correction bits in memory coupled to a data-protected processor port Dec 4, 2011 Issued
Array ( [id] => 8267491 [patent_doc_number] => 20120166919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'DATA PROCESSING DEVICE AND METHOD FOR CHECKING PARAMETER VALUES OF THE DATA PROCESSING DEVICE' [patent_app_type] => utility [patent_app_number] => 13/310708 [patent_app_country] => US [patent_app_date] => 2011-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1710 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13310708 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/310708
Data processing device and method for checking parameter values of the data processing device Dec 2, 2011 Issued
Array ( [id] => 9834560 [patent_doc_number] => 08943393 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-01-27 [patent_title] => 'Distributed burst error protection' [patent_app_type] => utility [patent_app_number] => 13/310628 [patent_app_country] => US [patent_app_date] => 2011-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 5810 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13310628 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/310628
Distributed burst error protection Dec 1, 2011 Issued
Array ( [id] => 10841312 [patent_doc_number] => 08869013 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-10-21 [patent_title] => 'Circuit enabling and a method of generating a product in a decoder circuit' [patent_app_type] => utility [patent_app_number] => 13/308748 [patent_app_country] => US [patent_app_date] => 2011-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6742 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13308748 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/308748
Circuit enabling and a method of generating a product in a decoder circuit Nov 30, 2011 Issued
Array ( [id] => 8267478 [patent_doc_number] => 20120166907 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'OBFUSCATING DATA STORED IN A DISPERSED STORAGE NETWORK' [patent_app_type] => utility [patent_app_number] => 13/309432 [patent_app_country] => US [patent_app_date] => 2011-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 20609 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13309432 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/309432
Obfuscating data stored in a dispersed storage network Nov 30, 2011 Issued
Array ( [id] => 9820983 [patent_doc_number] => 08930787 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-01-06 [patent_title] => 'Decoder in a device receiving data having an error correction code and a method of decoding data' [patent_app_type] => utility [patent_app_number] => 13/308726 [patent_app_country] => US [patent_app_date] => 2011-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4898 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13308726 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/308726
Decoder in a device receiving data having an error correction code and a method of decoding data Nov 30, 2011 Issued
Array ( [id] => 8843387 [patent_doc_number] => 20130139015 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-30 [patent_title] => 'METHODS AND APPARATUS FOR TESTING MULTIPLE-IC DEVICES' [patent_app_type] => utility [patent_app_number] => 13/308236 [patent_app_country] => US [patent_app_date] => 2011-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10457 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13308236 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/308236
Methods and apparatus for testing multiple-IC devices Nov 29, 2011 Issued
Array ( [id] => 7809113 [patent_doc_number] => 20120060067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-08 [patent_title] => 'APPARATUS AND METHOD OF AUTHENTICATING JOINT TEST ACTION GROUP (JTAG)' [patent_app_type] => utility [patent_app_number] => 13/291324 [patent_app_country] => US [patent_app_date] => 2011-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3572 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0060/20120060067.pdf [firstpage_image] =>[orig_patent_app_number] => 13291324 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/291324
APPARATUS AND METHOD OF AUTHENTICATING JOINT TEST ACTION GROUP (JTAG) Nov 7, 2011 Abandoned
Array ( [id] => 8280181 [patent_doc_number] => 20120174049 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-05 [patent_title] => 'TIMING-AWARE TEST GENERATION AND FAULT SIMULATION' [patent_app_type] => utility [patent_app_number] => 13/285899 [patent_app_country] => US [patent_app_date] => 2011-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 16445 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13285899 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/285899
Timing-aware test generation and fault simulation Oct 30, 2011 Issued
Array ( [id] => 7759947 [patent_doc_number] => 20120030527 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-02 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/251802 [patent_app_country] => US [patent_app_date] => 2011-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5571 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20120030527.pdf [firstpage_image] =>[orig_patent_app_number] => 13251802 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/251802
SEMICONDUCTOR MEMORY DEVICE Oct 2, 2011 Abandoned
Array ( [id] => 8965578 [patent_doc_number] => 20130205180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-08 [patent_title] => 'FAULT DETECTION SYSTEM, ACQUISITION APPARATUS, FAULT DETECTION METHOD, PROGRAM, AND NON-TRANSITORY COMPUTER-READABLE MEDIUM' [patent_app_type] => utility [patent_app_number] => 13/877601 [patent_app_country] => US [patent_app_date] => 2011-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 12294 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13877601 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/877601
Fault detection system, acquisition apparatus, fault detection method, program, and non-transitory computer-readable medium Sep 27, 2011 Issued
Array ( [id] => 7563012 [patent_doc_number] => 20110276846 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-10 [patent_title] => 'UNINITIALIZED MEMORY DETECTION USING ERROR CORRECTION CODES AND BUILT-IN SELF TEST' [patent_app_type] => utility [patent_app_number] => 13/187657 [patent_app_country] => US [patent_app_date] => 2011-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6174 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0276/20110276846.pdf [firstpage_image] =>[orig_patent_app_number] => 13187657 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/187657
Uninitialized memory detection using error correction codes and built-in self test Jul 20, 2011 Issued
Array ( [id] => 7575502 [patent_doc_number] => 20110271158 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-03 [patent_title] => 'METHOD AND APPARATUS FOR TESTING HIGH CAPACITY/HIGH BANDWIDTH MEMORY DEVICES' [patent_app_type] => utility [patent_app_number] => 13/180301 [patent_app_country] => US [patent_app_date] => 2011-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3627 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0271/20110271158.pdf [firstpage_image] =>[orig_patent_app_number] => 13180301 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/180301
Method and apparatus for testing high capacity/high bandwidth memory devices Jul 10, 2011 Issued
Array ( [id] => 8242565 [patent_doc_number] => 20120151301 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-14 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/176030 [patent_app_country] => US [patent_app_date] => 2011-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8296 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13176030 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/176030
SEMICONDUCTOR MEMORY DEVICE Jul 4, 2011 Abandoned
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