Search

Austin Murata

Examiner (ID: 10394, Phone: (571)270-5596 , Office: P/1712 )

Most Active Art Unit
1712
Art Unit(s)
1712, 1792
Total Applications
853
Issued Applications
467
Pending Applications
93
Abandoned Applications
315

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6094111 [patent_doc_number] => 20110219266 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-08 [patent_title] => 'System and Method of Testing an Error Correction Module' [patent_app_type] => utility [patent_app_number] => 12/717165 [patent_app_country] => US [patent_app_date] => 2010-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4568 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0219/20110219266.pdf [firstpage_image] =>[orig_patent_app_number] => 12717165 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/717165
System and Method of Testing an Error Correction Module Mar 3, 2010 Abandoned
Array ( [id] => 9555744 [patent_doc_number] => 08762818 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-06-24 [patent_title] => 'System and methods for performing decoding error detection in a storage device' [patent_app_type] => utility [patent_app_number] => 12/713520 [patent_app_country] => US [patent_app_date] => 2010-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5739 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12713520 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/713520
System and methods for performing decoding error detection in a storage device Feb 25, 2010 Issued
Array ( [id] => 5940201 [patent_doc_number] => 20110214040 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-01 [patent_title] => 'Method and System For Cyclic Redundancy Check' [patent_app_type] => utility [patent_app_number] => 12/713600 [patent_app_country] => US [patent_app_date] => 2010-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8571 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20110214040.pdf [firstpage_image] =>[orig_patent_app_number] => 12713600 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/713600
Method and system for cyclic redundancy check Feb 25, 2010 Issued
Array ( [id] => 6565111 [patent_doc_number] => 20100223514 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-02 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/712529 [patent_app_country] => US [patent_app_date] => 2010-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5141 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0223/20100223514.pdf [firstpage_image] =>[orig_patent_app_number] => 12712529 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/712529
SEMICONDUCTOR MEMORY DEVICE Feb 24, 2010 Abandoned
Array ( [id] => 6031841 [patent_doc_number] => 20110055661 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-03 [patent_title] => 'METHOD AND APPARATUS FOR NESTED DISBURSED STORAGE' [patent_app_type] => utility [patent_app_number] => 12/712773 [patent_app_country] => US [patent_app_date] => 2010-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 12611 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20110055661.pdf [firstpage_image] =>[orig_patent_app_number] => 12712773 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/712773
Method and apparatus for nested dispersed storage Feb 24, 2010 Issued
Array ( [id] => 6031843 [patent_doc_number] => 20110055662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-03 [patent_title] => 'NESTED DISTRIBUTED STORAGE UNIT AND APPLICATIONS THEREOF' [patent_app_type] => utility [patent_app_number] => 12/712842 [patent_app_country] => US [patent_app_date] => 2010-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 12609 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20110055662.pdf [firstpage_image] =>[orig_patent_app_number] => 12712842 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/712842
Nested distributed storage unit and applications thereof Feb 24, 2010 Issued
Array ( [id] => 8849338 [patent_doc_number] => 08458538 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-04 [patent_title] => 'Latency detection in a memory built-in self-test by using a ping signal' [patent_app_type] => utility [patent_app_number] => 12/709605 [patent_app_country] => US [patent_app_date] => 2010-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 8587 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12709605 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/709605
Latency detection in a memory built-in self-test by using a ping signal Feb 21, 2010 Issued
Array ( [id] => 6524294 [patent_doc_number] => 20100211820 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-19 [patent_title] => 'Method of managing non-volatile memory device and memory system including the same' [patent_app_type] => utility [patent_app_number] => 12/656718 [patent_app_country] => US [patent_app_date] => 2010-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 7923 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0211/20100211820.pdf [firstpage_image] =>[orig_patent_app_number] => 12656718 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/656718
Method of managing non-volatile memory device and memory system including the same Feb 15, 2010 Abandoned
Array ( [id] => 8087631 [patent_doc_number] => 08151150 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-03 [patent_title] => 'Data storage device and method for writing test data to a memory' [patent_app_type] => utility [patent_app_number] => 12/705644 [patent_app_country] => US [patent_app_date] => 2010-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4054 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/151/08151150.pdf [firstpage_image] =>[orig_patent_app_number] => 12705644 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/705644
Data storage device and method for writing test data to a memory Feb 14, 2010 Issued
Array ( [id] => 6414281 [patent_doc_number] => 20100306579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-02 [patent_title] => 'NONVOLATILE MEMORY DEVICE AND METHOD OF PROGRAMMING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/700507 [patent_app_country] => US [patent_app_date] => 2010-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3863 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0306/20100306579.pdf [firstpage_image] =>[orig_patent_app_number] => 12700507 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/700507
NONVOLATILE MEMORY DEVICE AND METHOD OF PROGRAMMING THE SAME Feb 3, 2010 Abandoned
Array ( [id] => 6337172 [patent_doc_number] => 20100199018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-05 [patent_title] => 'DATA TRANSFER SYSTEM, DATA TRANSMITTING APPARATUS, DATA RECEIVING APPARATUS, AND DATA TRANSFER METHOD' [patent_app_type] => utility [patent_app_number] => 12/698867 [patent_app_country] => US [patent_app_date] => 2010-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11624 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0199/20100199018.pdf [firstpage_image] =>[orig_patent_app_number] => 12698867 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/698867
DATA TRANSFER SYSTEM, DATA TRANSMITTING APPARATUS, DATA RECEIVING APPARATUS, AND DATA TRANSFER METHOD Feb 1, 2010 Abandoned
Array ( [id] => 6586070 [patent_doc_number] => 20100235692 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-16 [patent_title] => 'MEMORY TEST CIRCUIT AND PROCESSOR' [patent_app_type] => utility [patent_app_number] => 12/695358 [patent_app_country] => US [patent_app_date] => 2010-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 15068 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20100235692.pdf [firstpage_image] =>[orig_patent_app_number] => 12695358 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/695358
MEMORY TEST CIRCUIT AND PROCESSOR Jan 27, 2010 Abandoned
Array ( [id] => 6153919 [patent_doc_number] => 20110022907 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-27 [patent_title] => 'FPGA Test Configuration Minimization' [patent_app_type] => utility [patent_app_number] => 12/689791 [patent_app_country] => US [patent_app_date] => 2010-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2946 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20110022907.pdf [firstpage_image] =>[orig_patent_app_number] => 12689791 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/689791
FPGA Test Configuration Minimization Jan 18, 2010 Abandoned
Array ( [id] => 6182181 [patent_doc_number] => 20110179325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-21 [patent_title] => 'SYSTEM FOR BOUNDARY SCAN REGISTER CHAIN COMPRESSION' [patent_app_type] => utility [patent_app_number] => 12/687893 [patent_app_country] => US [patent_app_date] => 2010-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3223 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20110179325.pdf [firstpage_image] =>[orig_patent_app_number] => 12687893 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/687893
SYSTEM FOR BOUNDARY SCAN REGISTER CHAIN COMPRESSION Jan 14, 2010 Abandoned
Array ( [id] => 6409799 [patent_doc_number] => 20100180167 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-15 [patent_title] => 'ELECTRONIC CONTROL APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/652220 [patent_app_country] => US [patent_app_date] => 2010-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5647 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20100180167.pdf [firstpage_image] =>[orig_patent_app_number] => 12652220 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/652220
Electronic control apparatus Jan 4, 2010 Issued
Array ( [id] => 6234393 [patent_doc_number] => 20100185909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-22 [patent_title] => 'Asynchronous Scan Chain Circuit' [patent_app_type] => utility [patent_app_number] => 12/651919 [patent_app_country] => US [patent_app_date] => 2010-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4543 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0185/20100185909.pdf [firstpage_image] =>[orig_patent_app_number] => 12651919 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/651919
Asynchronous Scan Chain Circuit Jan 3, 2010 Abandoned
Array ( [id] => 6166731 [patent_doc_number] => 20110161752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'ROBUST MEMORY LINK TESTING USING MEMORY CONTROLLER' [patent_app_type] => utility [patent_app_number] => 12/651252 [patent_app_country] => US [patent_app_date] => 2009-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3884 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20110161752.pdf [firstpage_image] =>[orig_patent_app_number] => 12651252 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/651252
Robust memory link testing using memory controller Dec 30, 2009 Issued
Array ( [id] => 6647187 [patent_doc_number] => 20100174954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-08 [patent_title] => 'NON-POLYNOMIAL PROCESSING UNIT FOR SOFT-DECISION ERROR CORRECTION CODING' [patent_app_type] => utility [patent_app_number] => 12/651386 [patent_app_country] => US [patent_app_date] => 2009-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7126 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20100174954.pdf [firstpage_image] =>[orig_patent_app_number] => 12651386 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/651386
Non-polynomial processing unit for soft-decision error correction coding Dec 30, 2009 Issued
Array ( [id] => 8087625 [patent_doc_number] => 08151149 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-03 [patent_title] => 'Semiconductor memory apparatus and method of testing the same' [patent_app_type] => utility [patent_app_number] => 12/649743 [patent_app_country] => US [patent_app_date] => 2009-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4827 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/151/08151149.pdf [firstpage_image] =>[orig_patent_app_number] => 12649743 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/649743
Semiconductor memory apparatus and method of testing the same Dec 29, 2009 Issued
Array ( [id] => 6330701 [patent_doc_number] => 20100327877 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'RADIO FREQUENCY IDENTIFICATION (RFID) DEVICE AND METHOD FOR TESTING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/650524 [patent_app_country] => US [patent_app_date] => 2009-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 70 [patent_figures_cnt] => 70 [patent_no_of_words] => 33106 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 24 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0327/20100327877.pdf [firstpage_image] =>[orig_patent_app_number] => 12650524 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/650524
RADIO FREQUENCY IDENTIFICATION (RFID) DEVICE AND METHOD FOR TESTING THE SAME Dec 29, 2009 Abandoned
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