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Austin Murata

Examiner (ID: 10394, Phone: (571)270-5596 , Office: P/1712 )

Most Active Art Unit
1712
Art Unit(s)
1712, 1792
Total Applications
853
Issued Applications
467
Pending Applications
93
Abandoned Applications
315

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6757612 [patent_doc_number] => 20030005389 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-02 [patent_title] => 'Test circuit for testing a synchronous circuit' [patent_app_type] => new [patent_app_number] => 10/140223 [patent_app_country] => US [patent_app_date] => 2002-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6400 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 10 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20030005389.pdf [firstpage_image] =>[orig_patent_app_number] => 10140223 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/140223
Test circuit for testing a synchronous circuit May 6, 2002 Abandoned
Array ( [id] => 6648197 [patent_doc_number] => 20030212934 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-13 [patent_title] => 'Debug port for on-die dram' [patent_app_type] => new [patent_app_number] => 10/139393 [patent_app_country] => US [patent_app_date] => 2002-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3196 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20030212934.pdf [firstpage_image] =>[orig_patent_app_number] => 10139393 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/139393
Debug port for on-die dram May 6, 2002 Abandoned
09/962200 Adaptive coding scheme for OFDM WLANS with a priori channel state information at the transmitter Sep 25, 2001 Abandoned
Array ( [id] => 6657698 [patent_doc_number] => 20030133519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-17 [patent_title] => 'Forward tracing decoder apparatus and method' [patent_app_type] => new [patent_app_number] => 09/955566 [patent_app_country] => US [patent_app_date] => 2001-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 21311 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20030133519.pdf [firstpage_image] =>[orig_patent_app_number] => 09955566 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/955566
Forward tracing decoder apparatus and method Sep 16, 2001 Abandoned
Array ( [id] => 4592077 [patent_doc_number] => 07836329 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-11-16 [patent_title] => 'Communication link protocol optimized for storage architectures' [patent_app_type] => utility [patent_app_number] => 09/751649 [patent_app_country] => US [patent_app_date] => 2000-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6812 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/836/07836329.pdf [firstpage_image] =>[orig_patent_app_number] => 09751649 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/751649
Communication link protocol optimized for storage architectures Dec 28, 2000 Issued
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