Austin Murata

Array ( [id] => 19030390 [patent_doc_number] => 11929762 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-12 [patent_title] => Low density parity check decoder and storage device [patent_app_type] => utility [patent_app_number] => 17/878431 [patent_app_country] => US [patent_app_date] => 2022-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 23 [patent_no_of_words] => 11795 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17878431 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19524614 [patent_doc_number] => 12126358 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-22 [patent_title] => Two-level error correcting code with sharing of check-bits [patent_app_type] => utility [patent_app_number] => 17/815624 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6536 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17815624 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19094516 [patent_doc_number] => 11955987 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-09 [patent_title] => Neural self-corrected min-sum decoder and an electronic device comprising the decoder [patent_app_type] => utility [patent_app_number] => 17/872692 [patent_app_country] => US [patent_app_date] => 2022-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9706 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17872692 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19314988 [patent_doc_number] => 12040819 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => Method and apparatus for decoding of data in communication and broadcasting systems [patent_app_type] => utility [patent_app_number] => 17/871506 [patent_app_country] => US [patent_app_date] => 2022-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 14322 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17871506 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18899345 [patent_doc_number] => 20240014830 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => SOFT DECODING CORRECTABLE PAGE ASSISTED LLR ESTIMATION [patent_app_type] => utility [patent_app_number] => 17/858408 [patent_app_country] => US [patent_app_date] => 2022-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8113 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17858408 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18189368 [patent_doc_number] => 11579953 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-14 [patent_title] => Method for encoded diagnostics in a functional safety system [patent_app_type] => utility [patent_app_number] => 17/856661 [patent_app_country] => US [patent_app_date] => 2022-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 22130 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 269 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17856661 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18662099 [patent_doc_number] => 20230308116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => METHOD AND APPARATUS FOR DECODING DATA PACKETS IN COMMUNICATION NETWORK [patent_app_type] => utility [patent_app_number] => 17/856004 [patent_app_country] => US [patent_app_date] => 2022-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7090 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17856004 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17934135 [patent_doc_number] => 20220329261 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => DECODING METHOD, DECODING DEVICE, CONTROL CIRCUIT, AND PROGRAM STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 17/848249 [patent_app_country] => US [patent_app_date] => 2022-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9896 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 393 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17848249 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18068815 [patent_doc_number] => 20220399903 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-15 [patent_title] => DECODING METHOD ADOPTING ALGORITHM WITH WEIGHT-BASED ADJUSTED PARAMETERS AND DECODING SYSTEM [patent_app_type] => utility [patent_app_number] => 17/835325 [patent_app_country] => US [patent_app_date] => 2022-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6414 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 296 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17835325 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18821930 [patent_doc_number] => 20230396271 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => EARLY STOPPING OF BIT-FLIP LOW DENSITY PARITY CHECK DECODING BASED ON SYNDROME WEIGHT [patent_app_type] => utility [patent_app_number] => 17/829913 [patent_app_country] => US [patent_app_date] => 2022-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9538 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17829913 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17841390 [patent_doc_number] => 20220278696 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-01 [patent_title] => APPARATUS AND METHOD INCLUDING NEURAL NETWORK LEARNING TO DETECT AND CORRECT QUANTUM ERRORS [patent_app_type] => utility [patent_app_number] => 17/750134 [patent_app_country] => US [patent_app_date] => 2022-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8392 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17750134 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20317233 [patent_doc_number] => 12455784 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-28 [patent_title] => Distributed error detection and correction with hamming code handoff [patent_app_type] => utility [patent_app_number] => 17/749921 [patent_app_country] => US [patent_app_date] => 2022-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 23 [patent_no_of_words] => 19490 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17749921 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17840493 [patent_doc_number] => 20220277799 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-01 [patent_title] => Built-In-Self-Test Circuits And Methods In Sectors Of Integrated Circuits [patent_app_type] => utility [patent_app_number] => 17/747808 [patent_app_country] => US [patent_app_date] => 2022-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5840 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17747808 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19741838 [patent_doc_number] => 12218691 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => Polarization adjusted channel coding design for complexity reduction [patent_app_type] => utility [patent_app_number] => 17/736675 [patent_app_country] => US [patent_app_date] => 2022-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 46678 [patent_no_of_claims] => 60 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17736675 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19109205 [patent_doc_number] => 11962324 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-04-16 [patent_title] => Threshold-based min-sum algorithm to lower the error floors of quantized low-density parity-check decoders [patent_app_type] => utility [patent_app_number] => 17/733924 [patent_app_country] => US [patent_app_date] => 2022-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 7900 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17733924 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18711728 [patent_doc_number] => 20230334357 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => PREPARATION OF QUBITS [patent_app_type] => utility [patent_app_number] => 17/659277 [patent_app_country] => US [patent_app_date] => 2022-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7151 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17659277 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17964576 [patent_doc_number] => 20220345157 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-27 [patent_title] => MULTIBYTE ERROR DETECTION [patent_app_type] => utility [patent_app_number] => 17/719648 [patent_app_country] => US [patent_app_date] => 2022-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7952 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17719648 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18177267 [patent_doc_number] => 20230037996 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => MEMORY DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/718422 [patent_app_country] => US [patent_app_date] => 2022-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9311 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17718422 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17753582 [patent_doc_number] => 20220231787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-21 [patent_title] => PRIORITY BASED MAPPING OF ENCODED BITS TO SYMBOLS [patent_app_type] => utility [patent_app_number] => 17/657938 [patent_app_country] => US [patent_app_date] => 2022-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10082 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17657938 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19567556 [patent_doc_number] => 12142333 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-12 [patent_title] => Error correction in a memory device having an error correction code of a predetermined code rate [patent_app_type] => utility [patent_app_number] => 17/712550 [patent_app_country] => US [patent_app_date] => 2022-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10272 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17712550 [rel_patent_id] =>[rel_patent_doc_number] =>)