Search

Austin Murata

Examiner (ID: 3702, Phone: (571)270-5596 , Office: P/1712 )

Most Active Art Unit
1712
Art Unit(s)
1792, 1712
Total Applications
876
Issued Applications
483
Pending Applications
87
Abandoned Applications
318

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17949555 [patent_doc_number] => 20220336574 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING CAPACITOR AND METHOD OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/854679 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8375 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17854679 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/854679
Semiconductor device including capacitor and method of forming the same Jun 29, 2022 Issued
Array ( [id] => 18236141 [patent_doc_number] => 11600709 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-07 [patent_title] => Memory cell and fabricating method of the same [patent_app_type] => utility [patent_app_number] => 17/853954 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2910 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17853954 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/853954
Memory cell and fabricating method of the same Jun 29, 2022 Issued
Array ( [id] => 17900896 [patent_doc_number] => 20220310558 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => METHOD FOR MANUFACTURING ELECTRONIC COMPONENT [patent_app_type] => utility [patent_app_number] => 17/839182 [patent_app_country] => US [patent_app_date] => 2022-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8653 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17839182 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/839182
Method for manufacturing electronic component Jun 12, 2022 Issued
Array ( [id] => 20133971 [patent_doc_number] => 12376302 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Semiconductor memory device and method for manufacturing semiconductor memory device [patent_app_type] => utility [patent_app_number] => 17/806111 [patent_app_country] => US [patent_app_date] => 2022-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 25 [patent_no_of_words] => 4426 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17806111 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/806111
Semiconductor memory device and method for manufacturing semiconductor memory device Jun 8, 2022 Issued
Array ( [id] => 17933566 [patent_doc_number] => 20220328692 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/835184 [patent_app_country] => US [patent_app_date] => 2022-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 52872 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17835184 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/835184
Method for manufacturing semiconductor device Jun 7, 2022 Issued
Array ( [id] => 19468176 [patent_doc_number] => 20240321846 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => SEMICONDUCTOR PACKAGE METHOD AND SEMICONDUCTOR PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/547864 [patent_app_country] => US [patent_app_date] => 2022-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5576 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18547864 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/547864
SEMICONDUCTOR PACKAGE METHOD AND SEMICONDUCTOR PACKAGE STRUCTURE Jun 6, 2022 Pending
Array ( [id] => 20161348 [patent_doc_number] => 12387983 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Forming self-aligned vias and air-gaps in semiconductor fabrication [patent_app_type] => utility [patent_app_number] => 17/833366 [patent_app_country] => US [patent_app_date] => 2022-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5525 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17833366 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/833366
Forming self-aligned vias and air-gaps in semiconductor fabrication Jun 5, 2022 Issued
Array ( [id] => 20734570 [patent_doc_number] => 12641835 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-26 [patent_title] => Dielectric engineered tunnel region in memory cells [patent_app_type] => utility [patent_app_number] => 17/830013 [patent_app_country] => US [patent_app_date] => 2022-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 19 [patent_no_of_words] => 10783 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17830013 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/830013
Dielectric engineered tunnel region in memory cells May 31, 2022 Issued
Array ( [id] => 17870822 [patent_doc_number] => 20220293559 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => FAN-OUT WAFER-LEVEL PACKAGING STRUCTURE AND METHOD PACKAGING THE SAME [patent_app_type] => utility [patent_app_number] => 17/830290 [patent_app_country] => US [patent_app_date] => 2022-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5067 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17830290 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/830290
Fan-out wafer-level packaging structure and method packaging the same May 31, 2022 Issued
Array ( [id] => 20748432 [patent_doc_number] => 12648375 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-02 [patent_title] => Structure and formation method of device with ferroelectric layer [patent_app_type] => utility [patent_app_number] => 17/732873 [patent_app_country] => US [patent_app_date] => 2022-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 30 [patent_no_of_words] => 1011 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17732873 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/732873
Structure and formation method of device with ferroelectric layer Apr 28, 2022 Issued
Array ( [id] => 18663283 [patent_doc_number] => 20230309309 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => SONOS memory cell structure and fabricating method of the same [patent_app_type] => utility [patent_app_number] => 17/722403 [patent_app_country] => US [patent_app_date] => 2022-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3088 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17722403 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/722403
SONOS memory cell structure and fabricating method of the same Apr 17, 2022 Issued
Array ( [id] => 18704852 [patent_doc_number] => 11791370 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-17 [patent_title] => Light-emitting device [patent_app_type] => utility [patent_app_number] => 17/659634 [patent_app_country] => US [patent_app_date] => 2022-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 47 [patent_no_of_words] => 7932 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17659634 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/659634
Light-emitting device Apr 17, 2022 Issued
Array ( [id] => 17780133 [patent_doc_number] => 20220246483 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-04 [patent_title] => SYSTEMS AND METHODS FOR SUCTION PAD ASSEMBLIES [patent_app_type] => utility [patent_app_number] => 17/721119 [patent_app_country] => US [patent_app_date] => 2022-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9395 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17721119 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/721119
Systems and methods for suction pad assemblies Apr 13, 2022 Issued
Array ( [id] => 17764748 [patent_doc_number] => 20220238361 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-28 [patent_title] => SEMICONDUCTOR PROCESS SYSTEM AND METHOD [patent_app_type] => utility [patent_app_number] => 17/717033 [patent_app_country] => US [patent_app_date] => 2022-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6806 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17717033 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/717033
Semiconductor process system and method Apr 7, 2022 Issued
Array ( [id] => 18008712 [patent_doc_number] => 20220367479 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => SEMICONDUCTOR MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 17/716215 [patent_app_country] => US [patent_app_date] => 2022-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8098 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17716215 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/716215
Semiconductor memory devices Apr 7, 2022 Issued
Array ( [id] => 17810973 [patent_doc_number] => 20220262808 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-18 [patent_title] => METHOD FOR FORMING SILICON-OXIDE-NITRIDE-OXIDE-SILICON (SONOS) MEMORY CELL [patent_app_type] => utility [patent_app_number] => 17/706577 [patent_app_country] => US [patent_app_date] => 2022-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2411 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17706577 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/706577
Method for forming silicon-oxide-nitride-oxide-silicon (SONOS) memory cell Mar 27, 2022 Issued
Array ( [id] => 18783851 [patent_doc_number] => 11825657 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-21 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/700522 [patent_app_country] => US [patent_app_date] => 2022-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 3127 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17700522 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/700522
Semiconductor device Mar 21, 2022 Issued
Array ( [id] => 19951348 [patent_doc_number] => 12322719 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-03 [patent_title] => Semiconductor device structure and method therefor [patent_app_type] => utility [patent_app_number] => 17/655799 [patent_app_country] => US [patent_app_date] => 2022-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 0 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17655799 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/655799
Semiconductor device structure and method therefor Mar 21, 2022 Issued
Array ( [id] => 17692201 [patent_doc_number] => 20220199494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WITH ETCH STOP LAYER HAVING GREATER THICKNESS [patent_app_type] => utility [patent_app_number] => 17/692360 [patent_app_country] => US [patent_app_date] => 2022-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9629 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17692360 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/692360
Method for fabricating semiconductor device with etch stop layer having greater thickness Mar 10, 2022 Issued
Array ( [id] => 18464358 [patent_doc_number] => 11688652 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-27 [patent_title] => Wafer level testing of optical components [patent_app_type] => utility [patent_app_number] => 17/653524 [patent_app_country] => US [patent_app_date] => 2022-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 14409 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17653524 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/653524
Wafer level testing of optical components Mar 3, 2022 Issued
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