Search

Avinash A. Savani

Examiner (ID: 192)

Most Active Art Unit
3749
Art Unit(s)
3743, 3749, 3762
Total Applications
1428
Issued Applications
1004
Pending Applications
115
Abandoned Applications
348

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17659267 [patent_doc_number] => 20220179732 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-09 [patent_title] => STRETCH FACTOR ERROR MITIGATION ENABLED QUANTUM COMPUTERS [patent_app_type] => utility [patent_app_number] => 17/652000 [patent_app_country] => US [patent_app_date] => 2022-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18555 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17652000 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/652000
Stretch factor error mitigation enabled quantum computers Feb 21, 2022 Issued
Array ( [id] => 17643950 [patent_doc_number] => 20220171688 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-02 [patent_title] => SCAN SYNCHRONOUS-WRITE-THROUGH TESTING ARCHITECTURES FOR A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/651595 [patent_app_country] => US [patent_app_date] => 2022-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9730 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17651595 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/651595
Scan synchronous-write-through testing architectures for a memory device Feb 17, 2022 Issued
Array ( [id] => 17751883 [patent_doc_number] => 20220230088 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-21 [patent_title] => METHOD AND APPARATUS FOR CROSSTALK ANALYSIS OF QUBITS, COMPUTER DEVICE, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 17/674793 [patent_app_country] => US [patent_app_date] => 2022-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13851 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17674793 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/674793
Method and apparatus for crosstalk analysis of qubits, computer device, and storage medium Feb 16, 2022 Issued
Array ( [id] => 18372393 [patent_doc_number] => 11652579 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-16 [patent_title] => Apparatus and method for improved uplink joint reception coordinated multi-point (CoMP) using a fake HARQ process [patent_app_type] => utility [patent_app_number] => 17/667936 [patent_app_country] => US [patent_app_date] => 2022-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8941 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 406 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17667936 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/667936
Apparatus and method for improved uplink joint reception coordinated multi-point (CoMP) using a fake HARQ process Feb 8, 2022 Issued
Array ( [id] => 19238330 [patent_doc_number] => 20240195525 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => COMMUNICATION DEVICE, COMMUNICATION METHOD, AND COMMUNICATION SYSTEM [patent_app_type] => utility [patent_app_number] => 18/551408 [patent_app_country] => US [patent_app_date] => 2022-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23210 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18551408 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/551408
Communication device, communication method, and communication system Feb 1, 2022 Issued
Array ( [id] => 18445420 [patent_doc_number] => 11680983 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-06-20 [patent_title] => Integrated circuit having an in-situ circuit for detecting an impending circuit failure [patent_app_type] => utility [patent_app_number] => 17/649623 [patent_app_country] => US [patent_app_date] => 2022-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7894 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17649623 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/649623
Integrated circuit having an in-situ circuit for detecting an impending circuit failure Jan 31, 2022 Issued
Array ( [id] => 18532291 [patent_doc_number] => 20230237364 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-27 [patent_title] => CLASSIFYING QUANTUM ERRORS [patent_app_type] => utility [patent_app_number] => 17/585922 [patent_app_country] => US [patent_app_date] => 2022-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5737 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17585922 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/585922
Classifying quantum errors Jan 26, 2022 Issued
Array ( [id] => 19045152 [patent_doc_number] => 11934261 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Flit-based parallel-forward error correction and parity [patent_app_type] => utility [patent_app_number] => 17/580408 [patent_app_country] => US [patent_app_date] => 2022-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 27 [patent_no_of_words] => 20940 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17580408 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/580408
Flit-based parallel-forward error correction and parity Jan 19, 2022 Issued
Array ( [id] => 17580272 [patent_doc_number] => 20220137127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => FAULT TOLERANT SYNCHRONIZER [patent_app_type] => utility [patent_app_number] => 17/573683 [patent_app_country] => US [patent_app_date] => 2022-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3792 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17573683 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/573683
Fault tolerant synchronizer Jan 11, 2022 Issued
Array ( [id] => 18479321 [patent_doc_number] => 11693055 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-04 [patent_title] => Direct scan access JTAG [patent_app_type] => utility [patent_app_number] => 17/573761 [patent_app_country] => US [patent_app_date] => 2022-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 35 [patent_no_of_words] => 13408 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17573761 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/573761
Direct scan access JTAG Jan 11, 2022 Issued
Array ( [id] => 18940974 [patent_doc_number] => 20240036113 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => TEST CIRCUIT, TEST METHOD, AND COMPUTING SYSTEM COMPRISING TEST CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/268517 [patent_app_country] => US [patent_app_date] => 2022-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8060 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18268517 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/268517
Test circuit, test method, and computing system comprising test circuit for testing sequential circuit in pipeline stage Jan 5, 2022 Issued
Array ( [id] => 19818173 [patent_doc_number] => 20250076380 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => HIGH-THROUGHPUT SCAN ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 18/726670 [patent_app_country] => US [patent_app_date] => 2022-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 27778 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18726670 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/726670
HIGH-THROUGHPUT SCAN ARCHITECTURE Jan 4, 2022 Pending
Array ( [id] => 18479322 [patent_doc_number] => 11693056 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-07-04 [patent_title] => Scan chain for memory with reduced power consumption [patent_app_type] => utility [patent_app_number] => 17/560180 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3274 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17560180 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/560180
Scan chain for memory with reduced power consumption Dec 21, 2021 Issued
Array ( [id] => 17709889 [patent_doc_number] => 20220209897 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => Indexing-Based Feedback Codes and Methods of Use [patent_app_type] => utility [patent_app_number] => 17/556155 [patent_app_country] => US [patent_app_date] => 2021-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5571 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17556155 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/556155
Indexing-based feedback codes and methods of use Dec 19, 2021 Issued
Array ( [id] => 17537528 [patent_doc_number] => 20220116137 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-14 [patent_title] => TRANSMISSION DEVICE, TRANSMISSION METHOD, RECEPTION DEVICE, AND RECEPTION METHOD [patent_app_type] => utility [patent_app_number] => 17/556256 [patent_app_country] => US [patent_app_date] => 2021-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11475 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17556256 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/556256
Transmission device, transmission method, reception device, and reception method Dec 19, 2021 Issued
Array ( [id] => 17522018 [patent_doc_number] => 20220107867 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-07 [patent_title] => END-TO-END DATA PROTECTION FOR COMPUTE IN MEMORY (CIM)/COMPUTE NEAR MEMORY (CNM) [patent_app_type] => utility [patent_app_number] => 17/553623 [patent_app_country] => US [patent_app_date] => 2021-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11391 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17553623 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/553623
End-to-end data protection for compute in memory (CIM)/compute near memory (CNM) Dec 15, 2021 Issued
Array ( [id] => 18386158 [patent_doc_number] => 11656939 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-23 [patent_title] => Storage cluster memory characterization [patent_app_type] => utility [patent_app_number] => 17/535152 [patent_app_country] => US [patent_app_date] => 2021-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10481 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17535152 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/535152
Storage cluster memory characterization Nov 23, 2021 Issued
Array ( [id] => 18154156 [patent_doc_number] => 11567131 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-31 [patent_title] => Programmable test compression architecture input/output shift register coupled to SCI/SCO/PCO [patent_app_type] => utility [patent_app_number] => 17/528372 [patent_app_country] => US [patent_app_date] => 2021-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 45 [patent_no_of_words] => 13765 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17528372 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/528372
Programmable test compression architecture input/output shift register coupled to SCI/SCO/PCO Nov 16, 2021 Issued
Array ( [id] => 17462380 [patent_doc_number] => 20220075685 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-10 [patent_title] => Data Storage System for Improving Data Throughput and Decode Capabilities [patent_app_type] => utility [patent_app_number] => 17/529189 [patent_app_country] => US [patent_app_date] => 2021-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8598 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17529189 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/529189
Data storage system for improving data throughput and decode capabilities Nov 16, 2021 Issued
Array ( [id] => 19565866 [patent_doc_number] => 12140632 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-12 [patent_title] => Device under test synchronization with automated test equipment check cycle [patent_app_type] => utility [patent_app_number] => 17/455237 [patent_app_country] => US [patent_app_date] => 2021-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6404 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17455237 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/455237
Device under test synchronization with automated test equipment check cycle Nov 16, 2021 Issued
Menu