Search

Awat M. Salih

Examiner (ID: 18788, Phone: (571)270-5601 , Office: P/2845 )

Most Active Art Unit
2845
Art Unit(s)
2845
Total Applications
569
Issued Applications
470
Pending Applications
50
Abandoned Applications
69

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20318063 [patent_doc_number] => 12456618 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-28 [patent_title] => Semiconductor-on-insulator (SOI) substrate and method for forming [patent_app_type] => utility [patent_app_number] => 18/761373 [patent_app_country] => US [patent_app_date] => 2024-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 31 [patent_no_of_words] => 6591 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18761373 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/761373
Semiconductor-on-insulator (SOI) substrate and method for forming Jul 1, 2024 Issued
Array ( [id] => 20148277 [patent_doc_number] => 12382637 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-05 [patent_title] => Microelectronic devices with lower recessed conductive structures and related methods [patent_app_type] => utility [patent_app_number] => 18/738970 [patent_app_country] => US [patent_app_date] => 2024-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 7267 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18738970 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/738970
Microelectronic devices with lower recessed conductive structures and related methods Jun 9, 2024 Issued
Array ( [id] => 19470492 [patent_doc_number] => 20240324162 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => SEMICONDUCTOR STRUCTURE HAVING A BUTTED CONTACT AND METHOD OF FORMING [patent_app_type] => utility [patent_app_number] => 18/734190 [patent_app_country] => US [patent_app_date] => 2024-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7958 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18734190 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/734190
SEMICONDUCTOR STRUCTURE HAVING A BUTTED CONTACT AND METHOD OF FORMING Jun 4, 2024 Pending
Array ( [id] => 19470492 [patent_doc_number] => 20240324162 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => SEMICONDUCTOR STRUCTURE HAVING A BUTTED CONTACT AND METHOD OF FORMING [patent_app_type] => utility [patent_app_number] => 18/734190 [patent_app_country] => US [patent_app_date] => 2024-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7958 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18734190 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/734190
SEMICONDUCTOR STRUCTURE HAVING A BUTTED CONTACT AND METHOD OF FORMING Jun 4, 2024 Pending
Array ( [id] => 19470492 [patent_doc_number] => 20240324162 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => SEMICONDUCTOR STRUCTURE HAVING A BUTTED CONTACT AND METHOD OF FORMING [patent_app_type] => utility [patent_app_number] => 18/734190 [patent_app_country] => US [patent_app_date] => 2024-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7958 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18734190 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/734190
SEMICONDUCTOR STRUCTURE HAVING A BUTTED CONTACT AND METHOD OF FORMING Jun 4, 2024 Pending
Array ( [id] => 20230389 [patent_doc_number] => 12419054 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-16 [patent_title] => Three-dimensional memory array with local line selector [patent_app_type] => utility [patent_app_number] => 18/732738 [patent_app_country] => US [patent_app_date] => 2024-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 108 [patent_no_of_words] => 8833 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18732738 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/732738
Three-dimensional memory array with local line selector Jun 3, 2024 Issued
Array ( [id] => 20174385 [patent_doc_number] => 12393129 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-19 [patent_title] => Method and device for cleaning substrates [patent_app_type] => utility [patent_app_number] => 18/671174 [patent_app_country] => US [patent_app_date] => 2024-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 4643 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18671174 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/671174
Method and device for cleaning substrates May 21, 2024 Issued
Array ( [id] => 19384665 [patent_doc_number] => 20240274535 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => STAIRCASE STRUCTURE IN THREE-DIMENSIONAL MEMORY DEVICE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/644606 [patent_app_country] => US [patent_app_date] => 2024-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13507 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18644606 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/644606
STAIRCASE STRUCTURE IN THREE-DIMENSIONAL MEMORY DEVICE AND METHOD FOR FORMING THE SAME Apr 23, 2024 Pending
Array ( [id] => 19364305 [patent_doc_number] => 20240266339 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/640295 [patent_app_country] => US [patent_app_date] => 2024-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14701 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18640295 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/640295
SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR MEMORY DEVICE Apr 18, 2024 Pending
Array ( [id] => 19364194 [patent_doc_number] => 20240266228 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => Methods of Forming Semiconductor Devices [patent_app_type] => utility [patent_app_number] => 18/638343 [patent_app_country] => US [patent_app_date] => 2024-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11524 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18638343 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/638343
Methods of Forming Semiconductor Devices Apr 16, 2024 Pending
Array ( [id] => 19364194 [patent_doc_number] => 20240266228 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => Methods of Forming Semiconductor Devices [patent_app_type] => utility [patent_app_number] => 18/638343 [patent_app_country] => US [patent_app_date] => 2024-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11524 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18638343 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/638343
Methods of Forming Semiconductor Devices Apr 16, 2024 Pending
Array ( [id] => 19305792 [patent_doc_number] => 20240234372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => METHOD OF FORMING PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/614756 [patent_app_country] => US [patent_app_date] => 2024-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7715 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18614756 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/614756
METHOD OF FORMING PACKAGE STRUCTURE Mar 24, 2024 Pending
Array ( [id] => 19305792 [patent_doc_number] => 20240234372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => METHOD OF FORMING PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/614756 [patent_app_country] => US [patent_app_date] => 2024-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7715 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18614756 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/614756
METHOD OF FORMING PACKAGE STRUCTURE Mar 24, 2024 Pending
Array ( [id] => 19288042 [patent_doc_number] => 20240224525 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/608383 [patent_app_country] => US [patent_app_date] => 2024-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12111 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18608383 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/608383
Semiconductor memory device and method of fabricating the same Mar 17, 2024 Issued
Array ( [id] => 19288050 [patent_doc_number] => 20240224533 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => INTEGRATED CIRCUIT DEVICE INCLUDING VERTICAL MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/605115 [patent_app_country] => US [patent_app_date] => 2024-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15381 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18605115 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/605115
INTEGRATED CIRCUIT DEVICE INCLUDING VERTICAL MEMORY DEVICE Mar 13, 2024 Pending
Array ( [id] => 19351318 [patent_doc_number] => 20240260282 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => 3D SEMICONDUCTOR MEMORY DEVICES AND STRUCTURES [patent_app_type] => utility [patent_app_number] => 18/593884 [patent_app_country] => US [patent_app_date] => 2024-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 35245 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18593884 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/593884
3D semiconductor memory devices and structures Mar 1, 2024 Issued
Array ( [id] => 19830023 [patent_doc_number] => 12250830 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-11 [patent_title] => 3D semiconductor memory devices and structures [patent_app_type] => utility [patent_app_number] => 18/593727 [patent_app_country] => US [patent_app_date] => 2024-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 108 [patent_figures_cnt] => 180 [patent_no_of_words] => 35259 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18593727 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/593727
3D semiconductor memory devices and structures Feb 29, 2024 Issued
Array ( [id] => 19664350 [patent_doc_number] => 12178055 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-24 [patent_title] => 3D semiconductor memory devices and structures [patent_app_type] => utility [patent_app_number] => 18/592383 [patent_app_country] => US [patent_app_date] => 2024-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 108 [patent_figures_cnt] => 180 [patent_no_of_words] => 35262 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18592383 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/592383
3D semiconductor memory devices and structures Feb 28, 2024 Issued
Array ( [id] => 19308769 [patent_doc_number] => 20240237352 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => MICROELECTRONIC DEVICES WITH SOURCE REGION VERTICALLY BETWEEN TIERED DECKS, AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 18/581667 [patent_app_country] => US [patent_app_date] => 2024-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19991 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18581667 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/581667
MICROELECTRONIC DEVICES WITH SOURCE REGION VERTICALLY BETWEEN TIERED DECKS, AND RELATED METHODS Feb 19, 2024 Pending
Array ( [id] => 19409117 [patent_doc_number] => 20240292628 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICE WITH BACKSIDE SUPPORT PILLAR STRUCTURES AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/442792 [patent_app_country] => US [patent_app_date] => 2024-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 31754 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18442792 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/442792
Three-dimensional memory device with backside support pillar structures and methods of forming the same Feb 14, 2024 Issued
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