Search

Awat M. Salih

Examiner (ID: 18788, Phone: (571)270-5601 , Office: P/2845 )

Most Active Art Unit
2845
Art Unit(s)
2845
Total Applications
569
Issued Applications
470
Pending Applications
50
Abandoned Applications
69

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12229788 [patent_doc_number] => 09917038 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-03-13 [patent_title] => 'Semiconductor package with multiple molding routing layers and a method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 15/347599 [patent_app_country] => US [patent_app_date] => 2016-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 31 [patent_no_of_words] => 6554 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15347599 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/347599
Semiconductor package with multiple molding routing layers and a method of manufacturing the same Nov 8, 2016 Issued
Array ( [id] => 12535023 [patent_doc_number] => 10008533 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-26 [patent_title] => Semiconductor package [patent_app_type] => utility [patent_app_number] => 15/346929 [patent_app_country] => US [patent_app_date] => 2016-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 7311 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15346929 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/346929
Semiconductor package Nov 8, 2016 Issued
Array ( [id] => 13043137 [patent_doc_number] => 10043708 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-07 [patent_title] => Structure and method for capping cobalt contacts [patent_app_type] => utility [patent_app_number] => 15/347119 [patent_app_country] => US [patent_app_date] => 2016-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 3702 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15347119 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/347119
Structure and method for capping cobalt contacts Nov 8, 2016 Issued
Array ( [id] => 13819485 [patent_doc_number] => 10186516 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-22 [patent_title] => One time programmable memory device, method of manufacturing the same, and electronic device including the same [patent_app_type] => utility [patent_app_number] => 15/347139 [patent_app_country] => US [patent_app_date] => 2016-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 73 [patent_figures_cnt] => 74 [patent_no_of_words] => 21301 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15347139 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/347139
One time programmable memory device, method of manufacturing the same, and electronic device including the same Nov 8, 2016 Issued
Array ( [id] => 12716938 [patent_doc_number] => 20180130812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-10 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICE WITH ELECTRICALLY ISOLATED SUPPORT PILLAR STRUCTURES AND METHOD OF MAKING THEREOF [patent_app_type] => utility [patent_app_number] => 15/347101 [patent_app_country] => US [patent_app_date] => 2016-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23145 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15347101 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/347101
Three-dimensional memory device with electrically isolated support pillar structures and method of making thereof Nov 8, 2016 Issued
Array ( [id] => 11666342 [patent_doc_number] => 20170155061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-01 [patent_title] => 'ORGANIC ELECTROLUMINESCENT MATERIALS AND DEVICES' [patent_app_type] => utility [patent_app_number] => 15/347371 [patent_app_country] => US [patent_app_date] => 2016-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 15517 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15347371 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/347371
Organic electroluminescent materials and devices Nov 8, 2016 Issued
Array ( [id] => 12089106 [patent_doc_number] => 09842840 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-12-12 [patent_title] => 'Transistors and memory arrays' [patent_app_type] => utility [patent_app_number] => 15/347623 [patent_app_country] => US [patent_app_date] => 2016-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 5554 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15347623 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/347623
Transistors and memory arrays Nov 8, 2016 Issued
Array ( [id] => 11673924 [patent_doc_number] => 20170162648 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-08 [patent_title] => 'Capacitor Formed On Heavily Doped Substrate' [patent_app_type] => utility [patent_app_number] => 15/347213 [patent_app_country] => US [patent_app_date] => 2016-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3406 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15347213 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/347213
Capacitor formed on heavily doped substrate Nov 8, 2016 Issued
Array ( [id] => 11959486 [patent_doc_number] => 20170263638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-14 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/346562 [patent_app_country] => US [patent_app_date] => 2016-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 13772 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15346562 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/346562
SEMICONDUCTOR MEMORY DEVICE Nov 7, 2016 Abandoned
Array ( [id] => 12717115 [patent_doc_number] => 20180130871 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-10 [patent_title] => CAPACITOR STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/346717 [patent_app_country] => US [patent_app_date] => 2016-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2908 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15346717 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/346717
CAPACITOR STRUCTURE AND MANUFACTURING METHOD THEREOF Nov 7, 2016 Abandoned
Array ( [id] => 13006307 [patent_doc_number] => 10026828 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-17 [patent_title] => Method to improve GE channel interfacial layer quality for CMOS FINFET [patent_app_type] => utility [patent_app_number] => 15/346586 [patent_app_country] => US [patent_app_date] => 2016-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 5260 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15346586 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/346586
Method to improve GE channel interfacial layer quality for CMOS FINFET Nov 7, 2016 Issued
Array ( [id] => 14177877 [patent_doc_number] => 10262959 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-16 [patent_title] => Semiconductor devices and methods of forming thereof [patent_app_type] => utility [patent_app_number] => 15/295631 [patent_app_country] => US [patent_app_date] => 2016-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 35 [patent_no_of_words] => 6031 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15295631 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/295631
Semiconductor devices and methods of forming thereof Oct 16, 2016 Issued
Array ( [id] => 16293695 [patent_doc_number] => 10770551 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-08 [patent_title] => P-I-N diode and connected group III-N device and their methods of fabrication [patent_app_type] => utility [patent_app_number] => 16/322453 [patent_app_country] => US [patent_app_date] => 2016-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 28 [patent_no_of_words] => 13259 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16322453 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/322453
P-I-N diode and connected group III-N device and their methods of fabrication Sep 29, 2016 Issued
Array ( [id] => 11398097 [patent_doc_number] => 20170018634 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-19 [patent_title] => '3C-SiC IGBT' [patent_app_type] => utility [patent_app_number] => 15/282235 [patent_app_country] => US [patent_app_date] => 2016-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3021 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15282235 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/282235
3C-SiC IGBT Sep 29, 2016 Abandoned
Array ( [id] => 14722515 [patent_doc_number] => 20190252321 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-15 [patent_title] => INTERCONNECTOR WITH BUNDLED INTERCONNECTS [patent_app_type] => utility [patent_app_number] => 16/335029 [patent_app_country] => US [patent_app_date] => 2016-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6631 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16335029 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/335029
INTERCONNECTOR WITH BUNDLED INTERCONNECTS Sep 27, 2016 Abandoned
Array ( [id] => 17381153 [patent_doc_number] => 11239186 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-01 [patent_title] => Die with embedded communication cavity [patent_app_type] => utility [patent_app_number] => 16/334965 [patent_app_country] => US [patent_app_date] => 2016-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 31 [patent_no_of_words] => 7648 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16334965 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/334965
Die with embedded communication cavity Sep 22, 2016 Issued
Array ( [id] => 15139725 [patent_doc_number] => 10483350 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-19 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 15/754784 [patent_app_country] => US [patent_app_date] => 2016-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 26 [patent_no_of_words] => 11247 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 394 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15754784 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/754784
Semiconductor device Aug 22, 2016 Issued
Array ( [id] => 17878504 [patent_doc_number] => 11450527 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-20 [patent_title] => Engineering tensile strain buffer in art for high quality Ge channel [patent_app_type] => utility [patent_app_number] => 16/303125 [patent_app_country] => US [patent_app_date] => 2016-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 5085 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16303125 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/303125
Engineering tensile strain buffer in art for high quality Ge channel Jul 1, 2016 Issued
Array ( [id] => 16324232 [patent_doc_number] => 10784204 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-22 [patent_title] => Rlink--die to die channel interconnect configurations to improve signaling [patent_app_type] => utility [patent_app_number] => 16/305012 [patent_app_country] => US [patent_app_date] => 2016-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 76 [patent_figures_cnt] => 83 [patent_no_of_words] => 187015 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16305012 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/305012
Rlink--die to die channel interconnect configurations to improve signaling Jul 1, 2016 Issued
Array ( [id] => 13392931 [patent_doc_number] => 20180248008 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-30 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/754599 [patent_app_country] => US [patent_app_date] => 2016-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12713 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15754599 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/754599
Semiconductor device Jun 26, 2016 Issued
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