Search

Awat M. Salih

Examiner (ID: 18788, Phone: (571)270-5601 , Office: P/2845 )

Most Active Art Unit
2845
Art Unit(s)
2845
Total Applications
569
Issued Applications
470
Pending Applications
50
Abandoned Applications
69

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16760010 [patent_doc_number] => 10978568 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-13 [patent_title] => Passivation of transistor channel region interfaces [patent_app_type] => utility [patent_app_number] => 15/754874 [patent_app_country] => US [patent_app_date] => 2015-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 12068 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15754874 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/754874
Passivation of transistor channel region interfaces Sep 24, 2015 Issued
Array ( [id] => 11564654 [patent_doc_number] => 09627249 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-18 [patent_title] => 'Semiconductor structure and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 14/857435 [patent_app_country] => US [patent_app_date] => 2015-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 4392 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14857435 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/857435
Semiconductor structure and method for manufacturing the same Sep 16, 2015 Issued
Array ( [id] => 11517387 [patent_doc_number] => 20170084461 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-23 [patent_title] => 'STRUCTURE AND FORMATION METHOD OF SEMICONDUCTOR DEVICE STRUCTURE' [patent_app_type] => utility [patent_app_number] => 14/856875 [patent_app_country] => US [patent_app_date] => 2015-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7426 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14856875 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/856875
Structure and formation method of semiconductor device structure Sep 16, 2015 Issued
Array ( [id] => 10740879 [patent_doc_number] => 20160087030 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-24 [patent_title] => 'CAPACITOR CELL AND METHOD FOR MANUFACTURING SAME' [patent_app_type] => utility [patent_app_number] => 14/856916 [patent_app_country] => US [patent_app_date] => 2015-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5491 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14856916 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/856916
CAPACITOR CELL AND METHOD FOR MANUFACTURING SAME Sep 16, 2015 Abandoned
Array ( [id] => 10740792 [patent_doc_number] => 20160086943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-24 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/857135 [patent_app_country] => US [patent_app_date] => 2015-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 13893 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14857135 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/857135
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Sep 16, 2015 Abandoned
Array ( [id] => 11645420 [patent_doc_number] => 09666819 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-30 [patent_title] => 'Organic light emitting diode and display device including the same' [patent_app_type] => utility [patent_app_number] => 14/856963 [patent_app_country] => US [patent_app_date] => 2015-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9840 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14856963 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/856963
Organic light emitting diode and display device including the same Sep 16, 2015 Issued
Array ( [id] => 10741043 [patent_doc_number] => 20160087194 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-24 [patent_title] => 'MAGNETIC TUNNEL JUNCTION DEVICE AND MAGNETORESISTIVE RANDOM ACCESS MEMORY' [patent_app_type] => utility [patent_app_number] => 14/857201 [patent_app_country] => US [patent_app_date] => 2015-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 10729 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14857201 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/857201
MAGNETIC TUNNEL JUNCTION DEVICE AND MAGNETORESISTIVE RANDOM ACCESS MEMORY Sep 16, 2015 Abandoned
Array ( [id] => 11585779 [patent_doc_number] => 09640430 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-02 [patent_title] => 'Semiconductor device with graphene encapsulated metal and method therefor' [patent_app_type] => utility [patent_app_number] => 14/856772 [patent_app_country] => US [patent_app_date] => 2015-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 3947 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14856772 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/856772
Semiconductor device with graphene encapsulated metal and method therefor Sep 16, 2015 Issued
Array ( [id] => 10758614 [patent_doc_number] => 20160104766 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-14 [patent_title] => 'Power Semiconductor Device with Source Trench and Termination Trench Implants' [patent_app_type] => utility [patent_app_number] => 14/856241 [patent_app_country] => US [patent_app_date] => 2015-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5349 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14856241 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/856241
Power semiconductor device with source trench and termination trench implants Sep 15, 2015 Issued
Array ( [id] => 11087672 [patent_doc_number] => 20160284639 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-29 [patent_title] => 'SEMICONDUCTOR STRUCTURE' [patent_app_type] => utility [patent_app_number] => 14/856469 [patent_app_country] => US [patent_app_date] => 2015-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2803 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14856469 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/856469
SEMICONDUCTOR STRUCTURE Sep 15, 2015 Abandoned
Array ( [id] => 11503202 [patent_doc_number] => 20170077387 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-16 [patent_title] => 'MAGNETIC TUNNEL JUNCTION (MTJ) DEVICES PARTICULARLY SUITED FOR EFFICIENT SPIN-TORQUE-TRANSFER (STT) MAGNETIC RANDOM ACCESS MEMORY (MRAM) (STT MRAM)' [patent_app_type] => utility [patent_app_number] => 14/856372 [patent_app_country] => US [patent_app_date] => 2015-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8899 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14856372 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/856372
MAGNETIC TUNNEL JUNCTION (MTJ) DEVICES PARTICULARLY SUITED FOR EFFICIENT SPIN-TORQUE-TRANSFER (STT) MAGNETIC RANDOM ACCESS MEMORY (MRAM) (STT MRAM) Sep 15, 2015 Abandoned
Array ( [id] => 11096508 [patent_doc_number] => 20160293477 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-06 [patent_title] => 'SILICON-ON-INSULATOR (SOI) WAFERS EMPLOYING MOLDED SUBSTRATES TO IMPROVE INSULATION AND REDUCE CURRENT LEAKAGE' [patent_app_type] => utility [patent_app_number] => 14/856418 [patent_app_country] => US [patent_app_date] => 2015-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5265 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14856418 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/856418
SILICON-ON-INSULATOR (SOI) WAFERS EMPLOYING MOLDED SUBSTRATES TO IMPROVE INSULATION AND REDUCE CURRENT LEAKAGE Sep 15, 2015 Abandoned
Array ( [id] => 11057356 [patent_doc_number] => 20160254318 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-01 [patent_title] => 'MAGNETIC RANDOM ACCESS MEMORY (MRAM) BIT CELLS EMPLOYING SOURCE LINES (SLs) AND/OR BIT LINES (BLs) DISPOSED IN MULTIPLE, STACKED METAL LAYERS TO REDUCE MRAM BIT CELL RESISTANCE' [patent_app_type] => utility [patent_app_number] => 14/856316 [patent_app_country] => US [patent_app_date] => 2015-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10238 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14856316 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/856316
MAGNETIC RANDOM ACCESS MEMORY (MRAM) BIT CELLS EMPLOYING SOURCE LINES (SLs) AND/OR BIT LINES (BLs) DISPOSED IN MULTIPLE, STACKED METAL LAYERS TO REDUCE MRAM BIT CELL RESISTANCE Sep 15, 2015 Abandoned
Array ( [id] => 10659818 [patent_doc_number] => 20160005962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-07 [patent_title] => 'Memory Cells, Methods of Forming Memory Cells and Methods of Forming Memory Arrays' [patent_app_type] => utility [patent_app_number] => 14/854212 [patent_app_country] => US [patent_app_date] => 2015-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 88 [patent_figures_cnt] => 88 [patent_no_of_words] => 12212 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14854212 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/854212
Memory cells, methods of forming memory cells and methods of forming memory arrays Sep 14, 2015 Issued
Array ( [id] => 11539439 [patent_doc_number] => 09613854 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-04 [patent_title] => 'Method and apparatus for back end of line semiconductor device processing' [patent_app_type] => utility [patent_app_number] => 14/853104 [patent_app_country] => US [patent_app_date] => 2015-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 5123 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14853104 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/853104
Method and apparatus for back end of line semiconductor device processing Sep 13, 2015 Issued
Array ( [id] => 11945932 [patent_doc_number] => 20170250083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-31 [patent_title] => 'QUASI-VERTICAL DIODE WITH INTEGRATED OHMIC CONTACT BASE AND RELATED METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/507637 [patent_app_country] => US [patent_app_date] => 2015-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4005 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15507637 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/507637
Quasi-vertical diode with integrated ohmic contact base and related method thereof Aug 27, 2015 Issued
Array ( [id] => 10448073 [patent_doc_number] => 20150333087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-19 [patent_title] => 'MULTI-HEIGHT MULTI-COMPOSITION SEMICONDUCTOR FINS' [patent_app_type] => utility [patent_app_number] => 14/809919 [patent_app_country] => US [patent_app_date] => 2015-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5982 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14809919 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/809919
MULTI-HEIGHT MULTI-COMPOSITION SEMICONDUCTOR FINS Jul 26, 2015 Abandoned
Array ( [id] => 11411782 [patent_doc_number] => 09559096 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-31 [patent_title] => 'Devices and methodologies related to structures having HBT and FET' [patent_app_type] => utility [patent_app_number] => 14/789583 [patent_app_country] => US [patent_app_date] => 2015-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 7404 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14789583 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/789583
Devices and methodologies related to structures having HBT and FET Jun 30, 2015 Issued
Array ( [id] => 10780290 [patent_doc_number] => 20160126446 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-05 [patent_title] => 'PASSIVATION AND ALIGNMENT OF PIEZOELECTRONIC TRANSISTOR PIEZORESISTOR' [patent_app_type] => utility [patent_app_number] => 14/747223 [patent_app_country] => US [patent_app_date] => 2015-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 3817 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14747223 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/747223
Passivation and alignment of piezoelectronic transistor piezoresistor Jun 22, 2015 Issued
Array ( [id] => 10455427 [patent_doc_number] => 20150340442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-26 [patent_title] => 'Drain Extended Field Effect Transistors and Methods of Formation Thereof' [patent_app_type] => utility [patent_app_number] => 14/743796 [patent_app_country] => US [patent_app_date] => 2015-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 8551 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14743796 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/743796
Drain extended field effect transistors and methods of formation thereof Jun 17, 2015 Issued
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