Search

Awat M. Salih

Examiner (ID: 18788, Phone: (571)270-5601 , Office: P/2845 )

Most Active Art Unit
2845
Art Unit(s)
2845
Total Applications
569
Issued Applications
470
Pending Applications
50
Abandoned Applications
69

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 264116 [patent_doc_number] => 07569883 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-08-04 [patent_title] => 'Switching-controlled power MOS electronic device' [patent_app_type] => utility [patent_app_number] => 11/285759 [patent_app_country] => US [patent_app_date] => 2005-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 32 [patent_no_of_words] => 5932 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/569/07569883.pdf [firstpage_image] =>[orig_patent_app_number] => 11285759 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/285759
Switching-controlled power MOS electronic device Nov 20, 2005 Issued
Array ( [id] => 9074980 [patent_doc_number] => 08552560 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-08 [patent_title] => 'Alternate pad structures/passivation inegration schemes to reduce or eliminate IMC cracking in post wire bonded dies during Cu/Low-K BEOL processing' [patent_app_type] => utility [patent_app_number] => 11/283219 [patent_app_country] => US [patent_app_date] => 2005-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 2912 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11283219 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/283219
Alternate pad structures/passivation inegration schemes to reduce or eliminate IMC cracking in post wire bonded dies during Cu/Low-K BEOL processing Nov 17, 2005 Issued
Array ( [id] => 8572173 [patent_doc_number] => 08338822 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-25 [patent_title] => 'Electrical connection structure having elongated carbon structures with fine catalyst particle layer' [patent_app_type] => utility [patent_app_number] => 11/280269 [patent_app_country] => US [patent_app_date] => 2005-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 5861 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11280269 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/280269
Electrical connection structure having elongated carbon structures with fine catalyst particle layer Nov 16, 2005 Issued
Array ( [id] => 5139074 [patent_doc_number] => 20070001290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-04 [patent_title] => 'Semiconductor packaging structure' [patent_app_type] => utility [patent_app_number] => 11/280198 [patent_app_country] => US [patent_app_date] => 2005-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1495 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20070001290.pdf [firstpage_image] =>[orig_patent_app_number] => 11280198 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/280198
Semiconductor packaging structure Nov 16, 2005 Abandoned
Array ( [id] => 5747942 [patent_doc_number] => 20060110873 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-25 [patent_title] => 'Method for fabricating CMOS image sensor' [patent_app_type] => utility [patent_app_number] => 11/280318 [patent_app_country] => US [patent_app_date] => 2005-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3305 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20060110873.pdf [firstpage_image] =>[orig_patent_app_number] => 11280318 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/280318
Method for fabricating CMOS image sensor Nov 16, 2005 Abandoned
Array ( [id] => 5773900 [patent_doc_number] => 20060102908 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-18 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/272858 [patent_app_country] => US [patent_app_date] => 2005-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9403 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20060102908.pdf [firstpage_image] =>[orig_patent_app_number] => 11272858 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/272858
Silicon carbide high breakdown voltage semiconductor device Nov 14, 2005 Issued
Array ( [id] => 5869024 [patent_doc_number] => 20060163641 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-27 [patent_title] => 'Insulation film semiconductor device and method' [patent_app_type] => utility [patent_app_number] => 11/266988 [patent_app_country] => US [patent_app_date] => 2005-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5898 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0163/20060163641.pdf [firstpage_image] =>[orig_patent_app_number] => 11266988 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/266988
Insulation film semiconductor device and method Nov 3, 2005 Abandoned
Array ( [id] => 5805171 [patent_doc_number] => 20060091524 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-04 [patent_title] => 'Semiconductor module, process for producing the same, and film interposer' [patent_app_type] => utility [patent_app_number] => 11/262758 [patent_app_country] => US [patent_app_date] => 2005-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 13417 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0091/20060091524.pdf [firstpage_image] =>[orig_patent_app_number] => 11262758 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/262758
Semiconductor module, process for producing the same, and film interposer Oct 31, 2005 Abandoned
Array ( [id] => 5774099 [patent_doc_number] => 20060103002 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-18 [patent_title] => 'Semiconductor packages with asymmetric connection configurations' [patent_app_type] => utility [patent_app_number] => 11/261569 [patent_app_country] => US [patent_app_date] => 2005-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4321 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20060103002.pdf [firstpage_image] =>[orig_patent_app_number] => 11261569 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/261569
Semiconductor packages with asymmetric connection configurations Oct 30, 2005 Abandoned
Array ( [id] => 5805045 [patent_doc_number] => 20060091397 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-04 [patent_title] => 'Display device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/253738 [patent_app_country] => US [patent_app_date] => 2005-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 27210 [patent_no_of_claims] => 64 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0091/20060091397.pdf [firstpage_image] =>[orig_patent_app_number] => 11253738 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/253738
Display device and method for manufacturing the same Oct 19, 2005 Abandoned
Array ( [id] => 5810849 [patent_doc_number] => 20060081957 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-20 [patent_title] => 'Solid-state imaging device' [patent_app_type] => utility [patent_app_number] => 11/252909 [patent_app_country] => US [patent_app_date] => 2005-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5655 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20060081957.pdf [firstpage_image] =>[orig_patent_app_number] => 11252909 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/252909
Solid-state imaging device having impurities with different diffusion coefficients Oct 17, 2005 Issued
Array ( [id] => 5741263 [patent_doc_number] => 20060086985 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-27 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/251858 [patent_app_country] => US [patent_app_date] => 2005-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4694 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20060086985.pdf [firstpage_image] =>[orig_patent_app_number] => 11251858 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/251858
Semiconductor device Oct 17, 2005 Abandoned
Array ( [id] => 5703187 [patent_doc_number] => 20060192234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-31 [patent_title] => 'Solid-state imaging device' [patent_app_type] => utility [patent_app_number] => 11/250379 [patent_app_country] => US [patent_app_date] => 2005-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3271 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0192/20060192234.pdf [firstpage_image] =>[orig_patent_app_number] => 11250379 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/250379
Solid-state imaging device Oct 16, 2005 Abandoned
Array ( [id] => 5665856 [patent_doc_number] => 20060171206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-03 [patent_title] => 'NON-VOLATILE MEMORY AND FABRICATING METHOD AND OPERATING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 11/162158 [patent_app_country] => US [patent_app_date] => 2005-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6401 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20060171206.pdf [firstpage_image] =>[orig_patent_app_number] => 11162158 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/162158
NON-VOLATILE MEMORY AND FABRICATING METHOD AND OPERATING METHOD THEREOF Aug 30, 2005 Abandoned
Array ( [id] => 5697532 [patent_doc_number] => 20060214216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-28 [patent_title] => 'NON-VOLATILE MEMORY AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/161618 [patent_app_country] => US [patent_app_date] => 2005-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2327 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20060214216.pdf [firstpage_image] =>[orig_patent_app_number] => 11161618 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/161618
NON-VOLATILE MEMORY AND METHOD OF MANUFACTURING THE SAME Aug 9, 2005 Abandoned
Array ( [id] => 6929018 [patent_doc_number] => 20050280051 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-22 [patent_title] => 'Isolation structures for imposing stress patterns' [patent_app_type] => utility [patent_app_number] => 11/200958 [patent_app_country] => US [patent_app_date] => 2005-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4314 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0280/20050280051.pdf [firstpage_image] =>[orig_patent_app_number] => 11200958 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/200958
Isolation structures for imposing stress patterns Aug 9, 2005 Abandoned
Array ( [id] => 5049036 [patent_doc_number] => 20070029580 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-08 [patent_title] => 'IMAGE-PROCESSING UNIT' [patent_app_type] => utility [patent_app_number] => 11/161528 [patent_app_country] => US [patent_app_date] => 2005-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2169 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20070029580.pdf [firstpage_image] =>[orig_patent_app_number] => 11161528 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/161528
IMAGE-PROCESSING UNIT Aug 7, 2005 Abandoned
Array ( [id] => 5049032 [patent_doc_number] => 20070029576 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-08 [patent_title] => 'PROGRAMMABLE SEMICONDUCTOR DEVICE CONTAINING A VERTICALLY NOTCHED FUSIBLE LINK REGION AND METHODS OF MAKING AND USING SAME' [patent_app_type] => utility [patent_app_number] => 11/161439 [patent_app_country] => US [patent_app_date] => 2005-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5189 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20070029576.pdf [firstpage_image] =>[orig_patent_app_number] => 11161439 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/161439
PROGRAMMABLE SEMICONDUCTOR DEVICE CONTAINING A VERTICALLY NOTCHED FUSIBLE LINK REGION AND METHODS OF MAKING AND USING SAME Aug 2, 2005 Abandoned
Array ( [id] => 5239761 [patent_doc_number] => 20070018252 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-25 [patent_title] => 'SEMICONDUCTOR DEVICE CONTAINING HIGH PERFORMANCE P-MOSFET AND/OR N-MOSFET AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/161068 [patent_app_country] => US [patent_app_date] => 2005-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6209 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20070018252.pdf [firstpage_image] =>[orig_patent_app_number] => 11161068 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/161068
SEMICONDUCTOR DEVICE CONTAINING HIGH PERFORMANCE P-MOSFET AND/OR N-MOSFET AND METHOD OF FABRICATING THE SAME Jul 20, 2005 Abandoned
Array ( [id] => 8233283 [patent_doc_number] => 08198729 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-12 [patent_title] => 'Connection between a semiconductor chip and a circuit component with a large contact area' [patent_app_type] => utility [patent_app_number] => 11/183648 [patent_app_country] => US [patent_app_date] => 2005-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 64 [patent_figures_cnt] => 73 [patent_no_of_words] => 26415 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 339 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/198/08198729.pdf [firstpage_image] =>[orig_patent_app_number] => 11183648 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/183648
Connection between a semiconductor chip and a circuit component with a large contact area Jul 17, 2005 Issued
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