Search

Azizul Q. Choudhury

Examiner (ID: 5753, Phone: (571)272-3909 , Office: P/2456 )

Most Active Art Unit
2455
Art Unit(s)
2445, 2456, 2145, 2453, 2455, 2143
Total Applications
902
Issued Applications
628
Pending Applications
70
Abandoned Applications
209

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 981790 [patent_doc_number] => 06931580 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-08-16 [patent_title] => 'Rapid fail analysis of embedded objects' [patent_app_type] => utility [patent_app_number] => 09/524254 [patent_app_country] => US [patent_app_date] => 2000-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3113 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/931/06931580.pdf [firstpage_image] =>[orig_patent_app_number] => 09524254 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/524254
Rapid fail analysis of embedded objects Mar 12, 2000 Issued
Array ( [id] => 1533297 [patent_doc_number] => 06480976 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-12 [patent_title] => 'System and method for resource optimized integrated forward error correction in a DMT communication system' [patent_app_type] => B1 [patent_app_number] => 09/523747 [patent_app_country] => US [patent_app_date] => 2000-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7189 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/480/06480976.pdf [firstpage_image] =>[orig_patent_app_number] => 09523747 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/523747
System and method for resource optimized integrated forward error correction in a DMT communication system Mar 12, 2000 Issued
Array ( [id] => 1329395 [patent_doc_number] => 06606719 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-12 [patent_title] => 'Method and arrangement to estimate transmission channel characteristics' [patent_app_type] => B1 [patent_app_number] => 09/523581 [patent_app_country] => US [patent_app_date] => 2000-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2673 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/606/06606719.pdf [firstpage_image] =>[orig_patent_app_number] => 09523581 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/523581
Method and arrangement to estimate transmission channel characteristics Mar 9, 2000 Issued
Array ( [id] => 1382464 [patent_doc_number] => 06574758 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-03 [patent_title] => 'Testing a bus coupled between two electronic devices' [patent_app_type] => B1 [patent_app_number] => 09/522629 [patent_app_country] => US [patent_app_date] => 2000-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3548 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/574/06574758.pdf [firstpage_image] =>[orig_patent_app_number] => 09522629 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/522629
Testing a bus coupled between two electronic devices Mar 9, 2000 Issued
Array ( [id] => 4377359 [patent_doc_number] => 06219810 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-17 [patent_title] => 'Intelligent binning for electrically repairable semiconductor chips' [patent_app_type] => 1 [patent_app_number] => 9/523579 [patent_app_country] => US [patent_app_date] => 2000-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 5969 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/219/06219810.pdf [firstpage_image] =>[orig_patent_app_number] => 523579 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/523579
Intelligent binning for electrically repairable semiconductor chips Mar 9, 2000 Issued
Array ( [id] => 1314870 [patent_doc_number] => 06622272 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-16 [patent_title] => 'Automatic test equipment methods and apparatus for interfacing with an external device' [patent_app_type] => B1 [patent_app_number] => 09/523431 [patent_app_country] => US [patent_app_date] => 2000-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7575 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/622/06622272.pdf [firstpage_image] =>[orig_patent_app_number] => 09523431 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/523431
Automatic test equipment methods and apparatus for interfacing with an external device Mar 9, 2000 Issued
Array ( [id] => 1354065 [patent_doc_number] => 06594797 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-15 [patent_title] => 'Methods and circuits for precise edge placement of test signals' [patent_app_type] => B1 [patent_app_number] => 09/521947 [patent_app_country] => US [patent_app_date] => 2000-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3421 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/594/06594797.pdf [firstpage_image] =>[orig_patent_app_number] => 09521947 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/521947
Methods and circuits for precise edge placement of test signals Mar 8, 2000 Issued
Array ( [id] => 7644102 [patent_doc_number] => 06473872 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-29 [patent_title] => 'Address decoding system and method for failure toleration in a memory bank' [patent_app_type] => B1 [patent_app_number] => 09/520549 [patent_app_country] => US [patent_app_date] => 2000-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4645 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 17 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/473/06473872.pdf [firstpage_image] =>[orig_patent_app_number] => 09520549 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/520549
Address decoding system and method for failure toleration in a memory bank Mar 7, 2000 Issued
Array ( [id] => 1472077 [patent_doc_number] => 06460150 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-01 [patent_title] => 'Noise-predictive post-processing for PRML data channel' [patent_app_type] => B1 [patent_app_number] => 09/517352 [patent_app_country] => US [patent_app_date] => 2000-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4507 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/460/06460150.pdf [firstpage_image] =>[orig_patent_app_number] => 09517352 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/517352
Noise-predictive post-processing for PRML data channel Mar 1, 2000 Issued
Array ( [id] => 1417413 [patent_doc_number] => 06532558 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-11 [patent_title] => 'Manufacturing testing of hot-plug circuits on a computer backplane' [patent_app_type] => B1 [patent_app_number] => 09/518230 [patent_app_country] => US [patent_app_date] => 2000-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 8 [patent_no_of_words] => 5425 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/532/06532558.pdf [firstpage_image] =>[orig_patent_app_number] => 09518230 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/518230
Manufacturing testing of hot-plug circuits on a computer backplane Mar 1, 2000 Issued
Array ( [id] => 4399680 [patent_doc_number] => 06295614 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-25 [patent_title] => 'Apparatus for estimating bit error rate by sampling in WDM communication system' [patent_app_type] => 1 [patent_app_number] => 9/517678 [patent_app_country] => US [patent_app_date] => 2000-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2597 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/295/06295614.pdf [firstpage_image] =>[orig_patent_app_number] => 517678 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/517678
Apparatus for estimating bit error rate by sampling in WDM communication system Mar 1, 2000 Issued
Array ( [id] => 1236579 [patent_doc_number] => 06694468 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-17 [patent_title] => 'Method and apparatus to test memory' [patent_app_type] => B1 [patent_app_number] => 09/516321 [patent_app_country] => US [patent_app_date] => 2000-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1637 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/694/06694468.pdf [firstpage_image] =>[orig_patent_app_number] => 09516321 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/516321
Method and apparatus to test memory Feb 29, 2000 Issued
Array ( [id] => 1509126 [patent_doc_number] => 06467057 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-15 [patent_title] => 'Scan driver of LCD with fault detection and correction function' [patent_app_type] => B1 [patent_app_number] => 09/516534 [patent_app_country] => US [patent_app_date] => 2000-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 5749 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 422 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/467/06467057.pdf [firstpage_image] =>[orig_patent_app_number] => 09516534 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/516534
Scan driver of LCD with fault detection and correction function Feb 29, 2000 Issued
Array ( [id] => 1429732 [patent_doc_number] => 06530053 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-04 [patent_title] => 'Semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/516178 [patent_app_country] => US [patent_app_date] => 2000-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4011 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/530/06530053.pdf [firstpage_image] =>[orig_patent_app_number] => 09516178 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/516178
Semiconductor device Feb 29, 2000 Issued
Array ( [id] => 4293024 [patent_doc_number] => 06247150 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-12 [patent_title] => 'Automatic retransmission with order of information changed' [patent_app_type] => 1 [patent_app_number] => 9/516972 [patent_app_country] => US [patent_app_date] => 2000-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4049 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/247/06247150.pdf [firstpage_image] =>[orig_patent_app_number] => 516972 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/516972
Automatic retransmission with order of information changed Feb 28, 2000 Issued
Array ( [id] => 1229538 [patent_doc_number] => 06701467 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-02 [patent_title] => 'Interleaver device and method for interleaving a data set' [patent_app_type] => B1 [patent_app_number] => 09/517010 [patent_app_country] => US [patent_app_date] => 2000-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 10764 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/701/06701467.pdf [firstpage_image] =>[orig_patent_app_number] => 09517010 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/517010
Interleaver device and method for interleaving a data set Feb 27, 2000 Issued
Array ( [id] => 1429724 [patent_doc_number] => 06530052 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-04 [patent_title] => 'Method and apparatus for looping back a current state to resume a memory built-in self-test' [patent_app_type] => B1 [patent_app_number] => 09/514368 [patent_app_country] => US [patent_app_date] => 2000-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 7369 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/530/06530052.pdf [firstpage_image] =>[orig_patent_app_number] => 09514368 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/514368
Method and apparatus for looping back a current state to resume a memory built-in self-test Feb 27, 2000 Issued
Array ( [id] => 1324281 [patent_doc_number] => 06611930 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-26 [patent_title] => 'Linked lists diagnostics' [patent_app_type] => B1 [patent_app_number] => 09/500665 [patent_app_country] => US [patent_app_date] => 2000-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2946 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/611/06611930.pdf [firstpage_image] =>[orig_patent_app_number] => 09500665 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/500665
Linked lists diagnostics Feb 8, 2000 Issued
Array ( [id] => 1432424 [patent_doc_number] => 06505316 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-07 [patent_title] => 'Peripheral partitioning and tree decomposition for partial scan' [patent_app_type] => B1 [patent_app_number] => 09/497521 [patent_app_country] => US [patent_app_date] => 2000-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 6767 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/505/06505316.pdf [firstpage_image] =>[orig_patent_app_number] => 09497521 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/497521
Peripheral partitioning and tree decomposition for partial scan Feb 3, 2000 Issued
Array ( [id] => 1017344 [patent_doc_number] => 06895541 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-05-17 [patent_title] => 'Method and device for quantizing the input to soft decoders' [patent_app_type] => utility [patent_app_number] => 09/493004 [patent_app_country] => US [patent_app_date] => 2000-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3774 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/895/06895541.pdf [firstpage_image] =>[orig_patent_app_number] => 09493004 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/493004
Method and device for quantizing the input to soft decoders Jan 27, 2000 Issued
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