
Azizul Q. Choudhury
Examiner (ID: 5753, Phone: (571)272-3909 , Office: P/2456 )
| Most Active Art Unit | 2455 |
| Art Unit(s) | 2445, 2456, 2145, 2453, 2455, 2143 |
| Total Applications | 902 |
| Issued Applications | 628 |
| Pending Applications | 70 |
| Abandoned Applications | 209 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1501756
[patent_doc_number] => 06405342
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-06-11
[patent_title] => 'Disk drive employing a multiple-input sequence detector responsive to reliability metrics to improve a retry operation'
[patent_app_type] => B1
[patent_app_number] => 09/393511
[patent_app_country] => US
[patent_app_date] => 1999-09-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 14
[patent_no_of_words] => 8997
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/405/06405342.pdf
[firstpage_image] =>[orig_patent_app_number] => 09393511
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/393511 | Disk drive employing a multiple-input sequence detector responsive to reliability metrics to improve a retry operation | Sep 9, 1999 | Issued |
Array
(
[id] => 1402151
[patent_doc_number] => 06564352
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-05-13
[patent_title] => 'Error detection circuit applicable to a disk reproduction apparatus'
[patent_app_type] => B1
[patent_app_number] => 09/392721
[patent_app_country] => US
[patent_app_date] => 1999-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 22
[patent_no_of_words] => 12635
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/564/06564352.pdf
[firstpage_image] =>[orig_patent_app_number] => 09392721
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/392721 | Error detection circuit applicable to a disk reproduction apparatus | Sep 8, 1999 | Issued |
Array
(
[id] => 1324387
[patent_doc_number] => 06611940
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-08-26
[patent_title] => 'Decoding symbols representing digital words'
[patent_app_type] => B1
[patent_app_number] => 09/392501
[patent_app_country] => US
[patent_app_date] => 1999-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 4046
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/611/06611940.pdf
[firstpage_image] =>[orig_patent_app_number] => 09392501
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/392501 | Decoding symbols representing digital words | Sep 8, 1999 | Issued |
Array
(
[id] => 7642330
[patent_doc_number] => 06430716
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-08-06
[patent_title] => 'Method for writing data into non-volatile memory in vehicle electronic unit'
[patent_app_type] => B1
[patent_app_number] => 09/392731
[patent_app_country] => US
[patent_app_date] => 1999-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 4546
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/430/06430716.pdf
[firstpage_image] =>[orig_patent_app_number] => 09392731
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/392731 | Method for writing data into non-volatile memory in vehicle electronic unit | Sep 8, 1999 | Issued |
Array
(
[id] => 1279991
[patent_doc_number] => 06654923
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-11-25
[patent_title] => 'ATM group protection switching method and apparatus'
[patent_app_type] => B1
[patent_app_number] => 09/392455
[patent_app_country] => US
[patent_app_date] => 1999-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 5502
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/654/06654923.pdf
[firstpage_image] =>[orig_patent_app_number] => 09392455
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/392455 | ATM group protection switching method and apparatus | Sep 8, 1999 | Issued |
Array
(
[id] => 1525001
[patent_doc_number] => 06415401
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-07-02
[patent_title] => 'Integrated circuit having a test cell that resynchronizes the integrated circuit'
[patent_app_type] => B1
[patent_app_number] => 09/392036
[patent_app_country] => US
[patent_app_date] => 1999-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 17
[patent_no_of_words] => 4616
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/415/06415401.pdf
[firstpage_image] =>[orig_patent_app_number] => 09392036
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/392036 | Integrated circuit having a test cell that resynchronizes the integrated circuit | Sep 7, 1999 | Issued |
Array
(
[id] => 1178031
[patent_doc_number] => 06760880
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-07-06
[patent_title] => 'Scalar product and parity check'
[patent_app_type] => B1
[patent_app_number] => 09/391363
[patent_app_country] => US
[patent_app_date] => 1999-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3318
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/760/06760880.pdf
[firstpage_image] =>[orig_patent_app_number] => 09391363
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/391363 | Scalar product and parity check | Sep 7, 1999 | Issued |
Array
(
[id] => 1243245
[patent_doc_number] => 06684365
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-01-27
[patent_title] => 'Encoding device and method, decoding device and method, providing medium, and method for generating data substitution position information'
[patent_app_type] => B1
[patent_app_number] => 09/393074
[patent_app_country] => US
[patent_app_date] => 1999-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 35
[patent_no_of_words] => 10947
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/684/06684365.pdf
[firstpage_image] =>[orig_patent_app_number] => 09393074
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/393074 | Encoding device and method, decoding device and method, providing medium, and method for generating data substitution position information | Sep 6, 1999 | Issued |
Array
(
[id] => 1475147
[patent_doc_number] => 06408412
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-06-18
[patent_title] => 'Method and structure for testing embedded analog/mixed-signal cores in system-on-a-chip'
[patent_app_type] => B1
[patent_app_number] => 09/390064
[patent_app_country] => US
[patent_app_date] => 1999-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 4151
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/408/06408412.pdf
[firstpage_image] =>[orig_patent_app_number] => 09390064
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/390064 | Method and structure for testing embedded analog/mixed-signal cores in system-on-a-chip | Sep 2, 1999 | Issued |
Array
(
[id] => 1509129
[patent_doc_number] => 06467058
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-10-15
[patent_title] => 'Segmented compaction with pruning and critical fault elimination'
[patent_app_type] => B1
[patent_app_number] => 09/389590
[patent_app_country] => US
[patent_app_date] => 1999-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 6495
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/467/06467058.pdf
[firstpage_image] =>[orig_patent_app_number] => 09389590
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/389590 | Segmented compaction with pruning and critical fault elimination | Sep 2, 1999 | Issued |
Array
(
[id] => 1525043
[patent_doc_number] => 06415414
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-07-02
[patent_title] => 'Encoding apparatus and method, decoding apparatus and method, and providing medium'
[patent_app_type] => B1
[patent_app_number] => 09/389940
[patent_app_country] => US
[patent_app_date] => 1999-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 16
[patent_no_of_words] => 7524
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/415/06415414.pdf
[firstpage_image] =>[orig_patent_app_number] => 09389940
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/389940 | Encoding apparatus and method, decoding apparatus and method, and providing medium | Sep 2, 1999 | Issued |
Array
(
[id] => 1572593
[patent_doc_number] => 06378096
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-04-23
[patent_title] => 'On-line partitioning for sequential circuit test generation'
[patent_app_type] => B1
[patent_app_number] => 09/389591
[patent_app_country] => US
[patent_app_date] => 1999-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 28
[patent_no_of_words] => 7220
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/378/06378096.pdf
[firstpage_image] =>[orig_patent_app_number] => 09389591
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/389591 | On-line partitioning for sequential circuit test generation | Sep 2, 1999 | Issued |
Array
(
[id] => 7633002
[patent_doc_number] => 06658618
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-12-02
[patent_title] => 'Error recovery method for video compression coding using multiple reference buffers and a message channel'
[patent_app_type] => B1
[patent_app_number] => 09/389170
[patent_app_country] => US
[patent_app_date] => 1999-09-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 15
[patent_no_of_words] => 11212
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 10
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/658/06658618.pdf
[firstpage_image] =>[orig_patent_app_number] => 09389170
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/389170 | Error recovery method for video compression coding using multiple reference buffers and a message channel | Sep 1, 1999 | Issued |
Array
(
[id] => 1325812
[patent_doc_number] => 06615384
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-09-02
[patent_title] => 'Encoding/decoding method and apparatus and disk storage device'
[patent_app_type] => B1
[patent_app_number] => 09/388967
[patent_app_country] => US
[patent_app_date] => 1999-09-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 5572
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/615/06615384.pdf
[firstpage_image] =>[orig_patent_app_number] => 09388967
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/388967 | Encoding/decoding method and apparatus and disk storage device | Sep 1, 1999 | Issued |
Array
(
[id] => 1602143
[patent_doc_number] => 06385750
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-05-07
[patent_title] => 'Method and system for controlling test data volume in deterministic test pattern generation'
[patent_app_type] => B1
[patent_app_number] => 09/387865
[patent_app_country] => US
[patent_app_date] => 1999-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4313
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/385/06385750.pdf
[firstpage_image] =>[orig_patent_app_number] => 09387865
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/387865 | Method and system for controlling test data volume in deterministic test pattern generation | Aug 31, 1999 | Issued |
Array
(
[id] => 1596107
[patent_doc_number] => 06484286
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-11-19
[patent_title] => 'Error signal calculation from a Viterbi output'
[patent_app_type] => B1
[patent_app_number] => 09/388037
[patent_app_country] => US
[patent_app_date] => 1999-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 4700
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/484/06484286.pdf
[firstpage_image] =>[orig_patent_app_number] => 09388037
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/388037 | Error signal calculation from a Viterbi output | Aug 31, 1999 | Issued |
Array
(
[id] => 7644103
[patent_doc_number] => 06473871
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-10-29
[patent_title] => 'Method and apparatus for HASS testing of busses under programmable control'
[patent_app_type] => B1
[patent_app_number] => 09/386985
[patent_app_country] => US
[patent_app_date] => 1999-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 40
[patent_figures_cnt] => 44
[patent_no_of_words] => 26743
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 34
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/473/06473871.pdf
[firstpage_image] =>[orig_patent_app_number] => 09386985
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/386985 | Method and apparatus for HASS testing of busses under programmable control | Aug 30, 1999 | Issued |
Array
(
[id] => 1553192
[patent_doc_number] => 06446235
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-09-03
[patent_title] => 'Cumulative error detecting code'
[patent_app_type] => B1
[patent_app_number] => 09/386474
[patent_app_country] => US
[patent_app_date] => 1999-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 3374
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/446/06446235.pdf
[firstpage_image] =>[orig_patent_app_number] => 09386474
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/386474 | Cumulative error detecting code | Aug 30, 1999 | Issued |
Array
(
[id] => 1521857
[patent_doc_number] => 06502214
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-12-31
[patent_title] => 'Memory test circuit'
[patent_app_type] => B1
[patent_app_number] => 09/386158
[patent_app_country] => US
[patent_app_date] => 1999-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 4603
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/502/06502214.pdf
[firstpage_image] =>[orig_patent_app_number] => 09386158
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/386158 | Memory test circuit | Aug 30, 1999 | Issued |
Array
(
[id] => 1501747
[patent_doc_number] => 06405339
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-06-11
[patent_title] => 'Parallelized programmable encoder/syndrome generator'
[patent_app_type] => B1
[patent_app_number] => 09/387665
[patent_app_country] => US
[patent_app_date] => 1999-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4896
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/405/06405339.pdf
[firstpage_image] =>[orig_patent_app_number] => 09387665
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/387665 | Parallelized programmable encoder/syndrome generator | Aug 30, 1999 | Issued |