
Bac H. Au
Examiner (ID: 11304, Phone: (571)272-8795 , Office: P/2822 )
| Most Active Art Unit | 2822 |
| Art Unit(s) | 2898, 2822 |
| Total Applications | 1231 |
| Issued Applications | 975 |
| Pending Applications | 66 |
| Abandoned Applications | 213 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19467962
[patent_doc_number] => 20240321632
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-26
[patent_title] => SEMICONDUCTOR DEVICE INCLUDING LINER STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 18/733512
[patent_app_country] => US
[patent_app_date] => 2024-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7637
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18733512
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/733512 | SEMICONDUCTOR DEVICE INCLUDING LINER STRUCTURE | Jun 3, 2024 | Pending |
Array
(
[id] => 19936782
[patent_doc_number] => 12310002
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-05-20
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 18/666835
[patent_app_country] => US
[patent_app_date] => 2024-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 0
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18666835
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/666835 | Semiconductor device | May 16, 2024 | Issued |
Array
(
[id] => 19409214
[patent_doc_number] => 20240292725
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-29
[patent_title] => MANUFACTURING APPARATUS AND METHOD OF MANUFACTURING DISPLAY APPARATUS USING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/656780
[patent_app_country] => US
[patent_app_date] => 2024-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9895
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18656780
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/656780 | MANUFACTURING APPARATUS AND METHOD OF MANUFACTURING DISPLAY APPARATUS USING THE SAME | May 6, 2024 | Pending |
Array
(
[id] => 19407376
[patent_doc_number] => 20240290887
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-29
[patent_title] => SEMICONDUCTOR DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/656134
[patent_app_country] => US
[patent_app_date] => 2024-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11243
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18656134
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/656134 | Semiconductor devices | May 5, 2024 | Issued |
Array
(
[id] => 19936780
[patent_doc_number] => 12310000
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-05-20
[patent_title] => Manufacturing method of semiconductor device
[patent_app_type] => utility
[patent_app_number] => 18/655341
[patent_app_country] => US
[patent_app_date] => 2024-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 0
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 215
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18655341
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/655341 | Manufacturing method of semiconductor device | May 5, 2024 | Issued |
Array
(
[id] => 19407312
[patent_doc_number] => 20240290823
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-29
[patent_title] => STRUCTURE AND METHOD FOR FORMING INTEGRATED HIGH DENSITY MIM CAPACITOR
[patent_app_type] => utility
[patent_app_number] => 18/654658
[patent_app_country] => US
[patent_app_date] => 2024-05-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13820
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18654658
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/654658 | Structure and method for forming integrated high density MIM capacitor | May 2, 2024 | Issued |
Array
(
[id] => 20347545
[patent_doc_number] => 12471283
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-11-11
[patent_title] => Microelectronic devices with source region vertical extension between upper and lower channel regions, and related methods
[patent_app_type] => utility
[patent_app_number] => 18/649366
[patent_app_country] => US
[patent_app_date] => 2024-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 31
[patent_no_of_words] => 14571
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18649366
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/649366 | Microelectronic devices with source region vertical extension between upper and lower channel regions, and related methods | Apr 28, 2024 | Issued |
Array
(
[id] => 19394855
[patent_doc_number] => 20240284725
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-22
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/639156
[patent_app_country] => US
[patent_app_date] => 2024-04-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20186
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18639156
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/639156 | Display device | Apr 17, 2024 | Issued |
Array
(
[id] => 19349270
[patent_doc_number] => 20240258234
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-01
[patent_title] => MANUFACTURING METHOD OF A SEMICONDUCTOR DEVICE AND METHOD FOR CREATING A LAYOUT THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/633866
[patent_app_country] => US
[patent_app_date] => 2024-04-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9523
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 279
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18633866
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/633866 | Manufacturing method of a semiconductor device and method for creating a layout thereof | Apr 11, 2024 | Issued |
Array
(
[id] => 19337189
[patent_doc_number] => 20240251619
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-25
[patent_title] => DISPLAY SUBSTRATE AND DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/619330
[patent_app_country] => US
[patent_app_date] => 2024-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14207
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 342
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18619330
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/619330 | Display substrate and display device | Mar 27, 2024 | Issued |
Array
(
[id] => 20189839
[patent_doc_number] => 12400964
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-08-26
[patent_title] => Integrated circuit
[patent_app_type] => utility
[patent_app_number] => 18/609234
[patent_app_country] => US
[patent_app_date] => 2024-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 49
[patent_no_of_words] => 25495
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18609234
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/609234 | Integrated circuit | Mar 18, 2024 | Issued |
Array
(
[id] => 19945451
[patent_doc_number] => 12317601
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-05-27
[patent_title] => Dual-port SRAM structure
[patent_app_type] => utility
[patent_app_number] => 18/439486
[patent_app_country] => US
[patent_app_date] => 2024-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 2320
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18439486
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/439486 | Dual-port SRAM structure | Feb 11, 2024 | Issued |
Array
(
[id] => 19191576
[patent_doc_number] => 20240170489
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-23
[patent_title] => SEMICONDUCTOR WAFER WITH DEVICES HAVING DIFFERENT TOP LAYER THICKNESSES LAYER THICKNESSES
[patent_app_type] => utility
[patent_app_number] => 18/426243
[patent_app_country] => US
[patent_app_date] => 2024-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5039
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18426243
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/426243 | Semiconductor wafer with devices having different top layer thicknesses | Jan 28, 2024 | Issued |
Array
(
[id] => 19176114
[patent_doc_number] => 20240162088
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-16
[patent_title] => INTEGRATED CIRCUIT DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/422726
[patent_app_country] => US
[patent_app_date] => 2024-01-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12120
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18422726
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/422726 | Integrated circuit device | Jan 24, 2024 | Issued |
Array
(
[id] => 19161107
[patent_doc_number] => 20240153814
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-09
[patent_title] => METHODS OF FORMING SEMICONDUCTOR DEVICE STRUCTURES
[patent_app_type] => utility
[patent_app_number] => 18/406151
[patent_app_country] => US
[patent_app_date] => 2024-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7556
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18406151
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/406151 | Methods of forming semiconductor device structures | Jan 5, 2024 | Issued |
Array
(
[id] => 19321606
[patent_doc_number] => 20240243153
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-18
[patent_title] => IMAGE SENSOR
[patent_app_type] => utility
[patent_app_number] => 18/405372
[patent_app_country] => US
[patent_app_date] => 2024-01-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16328
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 327
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18405372
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/405372 | IMAGE SENSOR | Jan 4, 2024 | Pending |
Array
(
[id] => 19305822
[patent_doc_number] => 20240234402
[patent_country] => US
[patent_kind] => A9
[patent_issue_date] => 2024-07-11
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/404516
[patent_app_country] => US
[patent_app_date] => 2024-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15030
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18404516
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/404516 | SEMICONDUCTOR DEVICE | Jan 3, 2024 | Pending |
Array
(
[id] => 19305822
[patent_doc_number] => 20240234402
[patent_country] => US
[patent_kind] => A9
[patent_issue_date] => 2024-07-11
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/404516
[patent_app_country] => US
[patent_app_date] => 2024-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15030
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18404516
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/404516 | SEMICONDUCTOR DEVICE | Jan 3, 2024 | Pending |
Array
(
[id] => 19741362
[patent_doc_number] => 12218210
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-02-04
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 18/403495
[patent_app_country] => US
[patent_app_date] => 2024-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 41
[patent_figures_cnt] => 41
[patent_no_of_words] => 13115
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18403495
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/403495 | Semiconductor device | Jan 2, 2024 | Issued |
Array
(
[id] => 19221534
[patent_doc_number] => 20240186238
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-06
[patent_title] => TECHNIQUES TO INHIBIT DELAMINATION FROM FLOWABLE GAP-FILL DIELECTRIC
[patent_app_type] => utility
[patent_app_number] => 18/402941
[patent_app_country] => US
[patent_app_date] => 2024-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8464
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18402941
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/402941 | Techniques to inhibit delamination from flowable gap-fill dielectric | Jan 2, 2024 | Issued |