Search

Bac H. Au

Examiner (ID: 17152, Phone: (571)272-8795 , Office: P/2822 )

Most Active Art Unit
2822
Art Unit(s)
2822, 2898
Total Applications
1269
Issued Applications
989
Pending Applications
82
Abandoned Applications
214

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19741362 [patent_doc_number] => 12218210 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 18/403495 [patent_app_country] => US [patent_app_date] => 2024-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 41 [patent_no_of_words] => 13115 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18403495 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/403495
Semiconductor device Jan 2, 2024 Issued
Array ( [id] => 19221534 [patent_doc_number] => 20240186238 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => TECHNIQUES TO INHIBIT DELAMINATION FROM FLOWABLE GAP-FILL DIELECTRIC [patent_app_type] => utility [patent_app_number] => 18/402941 [patent_app_country] => US [patent_app_date] => 2024-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8464 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18402941 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/402941
Techniques to inhibit delamination from flowable gap-fill dielectric Jan 2, 2024 Issued
Array ( [id] => 19146567 [patent_doc_number] => 20240145597 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => Fin Field-Effect Transistor Device Having Contact Plugs with Re-Entrant Profile [patent_app_type] => utility [patent_app_number] => 18/402407 [patent_app_country] => US [patent_app_date] => 2024-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8792 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18402407 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/402407
Fin field-effect transistor device having contact plugs with re-entrant profile Jan 1, 2024 Issued
Array ( [id] => 19945388 [patent_doc_number] => 12317538 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-27 [patent_title] => Semiconductor devices [patent_app_type] => utility [patent_app_number] => 18/402295 [patent_app_country] => US [patent_app_date] => 2024-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 45 [patent_no_of_words] => 5802 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18402295 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/402295
Semiconductor devices Jan 1, 2024 Issued
Array ( [id] => 19285846 [patent_doc_number] => 20240222323 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => FAN-OUT STACKED PACKAGE, METHOD OF MAKING AND ELECTRONIC DEVICE INCLUDING THE STACKED PACKAGE [patent_app_type] => utility [patent_app_number] => 18/401329 [patent_app_country] => US [patent_app_date] => 2023-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9955 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18401329 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/401329
FAN-OUT STACKED PACKAGE, METHOD OF MAKING AND ELECTRONIC DEVICE INCLUDING THE STACKED PACKAGE Dec 28, 2023 Pending
Array ( [id] => 19130942 [patent_doc_number] => 20240136295 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => FRONT END OF LINE INTERCONNECT STRUCTURES AND ASSOCIATED SYSTEMS AND METHODS [patent_app_type] => utility [patent_app_number] => 18/400745 [patent_app_country] => US [patent_app_date] => 2023-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5146 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18400745 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/400745
Front end of line interconnect structures and associated systems and methods Dec 28, 2023 Issued
Array ( [id] => 19237476 [patent_doc_number] => 20240194671 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => TRANSISTOR CONFIGURATIONS FOR MULTI-DECK MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 18/542240 [patent_app_country] => US [patent_app_date] => 2023-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15645 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18542240 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/542240
Transistor configurations for multi-deck memory devices Dec 14, 2023 Issued
Array ( [id] => 20759998 [patent_doc_number] => 12652789 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-09 [patent_title] => Semiconductor devices having landing pad structures [patent_app_type] => utility [patent_app_number] => 18/536384 [patent_app_country] => US [patent_app_date] => 2023-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 3576 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18536384 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/536384
Semiconductor devices having landing pad structures Dec 11, 2023 Issued
Array ( [id] => 19720363 [patent_doc_number] => 12205906 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-21 [patent_title] => Electronic package and fabrication method thereof [patent_app_type] => utility [patent_app_number] => 18/537638 [patent_app_country] => US [patent_app_date] => 2023-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 3966 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18537638 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/537638
Electronic package and fabrication method thereof Dec 11, 2023 Issued
Array ( [id] => 19436166 [patent_doc_number] => 20240304664 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => FAST RECOVERY DIODE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/535464 [patent_app_country] => US [patent_app_date] => 2023-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4970 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18535464 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/535464
FAST RECOVERY DIODE AND METHOD FOR MANUFACTURING THE SAME Dec 10, 2023 Pending
Array ( [id] => 19269397 [patent_doc_number] => 20240213101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => ELECTRONIC CIRCUIT WITH MOS TRANSISTORS AND MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 18/535882 [patent_app_country] => US [patent_app_date] => 2023-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7515 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18535882 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/535882
ELECTRONIC CIRCUIT WITH MOS TRANSISTORS AND MANUFACTURING METHOD Dec 10, 2023 Pending
Array ( [id] => 20053744 [patent_doc_number] => 20250191966 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => LOWERING GATE ASPECT RATIO ON STI REGION [patent_app_type] => utility [patent_app_number] => 18/532617 [patent_app_country] => US [patent_app_date] => 2023-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4364 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18532617 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/532617
LOWERING GATE ASPECT RATIO ON STI REGION Dec 6, 2023 Pending
Array ( [id] => 19073344 [patent_doc_number] => 20240107770 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/530049 [patent_app_country] => US [patent_app_date] => 2023-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10486 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18530049 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/530049
Semiconductor memory device Dec 4, 2023 Issued
Array ( [id] => 19837491 [patent_doc_number] => 20250089277 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => METAL-INSULATOR-METAL (MIM) CAPACITORS WITH IMPROVED RELIABILITY [patent_app_type] => utility [patent_app_number] => 18/524533 [patent_app_country] => US [patent_app_date] => 2023-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9693 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18524533 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/524533
METAL-INSULATOR-METAL (MIM) CAPACITORS WITH IMPROVED RELIABILITY Nov 29, 2023 Pending
Array ( [id] => 19206378 [patent_doc_number] => 20240178277 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/523734 [patent_app_country] => US [patent_app_date] => 2023-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11244 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 300 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18523734 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/523734
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Nov 28, 2023 Pending
Array ( [id] => 19055030 [patent_doc_number] => 20240096999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => SILICIDE STRUCTURES IN TRANSISTORS AND METHODS OF FORMING [patent_app_type] => utility [patent_app_number] => 18/520326 [patent_app_country] => US [patent_app_date] => 2023-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10926 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18520326 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/520326
Silicide structures in transistors and methods of forming Nov 26, 2023 Issued
Array ( [id] => 20038010 [patent_doc_number] => 20250176232 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => GATE ELECTRODE STRUCTURE IN MEDIUM VOLTAGE DEVICE FOR SCALING AND INCREASED PERFORMANCE [patent_app_type] => utility [patent_app_number] => 18/519393 [patent_app_country] => US [patent_app_date] => 2023-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4273 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18519393 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/519393
GATE ELECTRODE STRUCTURE IN MEDIUM VOLTAGE DEVICE FOR SCALING AND INCREASED PERFORMANCE Nov 26, 2023 Pending
Array ( [id] => 19269470 [patent_doc_number] => 20240213174 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/515797 [patent_app_country] => US [patent_app_date] => 2023-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9784 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18515797 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/515797
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE Nov 20, 2023 Pending
Array ( [id] => 20748221 [patent_doc_number] => 12648160 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-02 [patent_title] => Semiconductor device structure with magnetic structure and method for forming the same [patent_app_type] => utility [patent_app_number] => 18/512281 [patent_app_country] => US [patent_app_date] => 2023-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 2869 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18512281 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/512281
Semiconductor device structure with magnetic structure and method for forming the same Nov 16, 2023 Issued
Array ( [id] => 19463930 [patent_doc_number] => 20240317599 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => METAL OXIDE NANOPARTICLE, NANOCOMPOSITE INCLUDING THE METAL OXIDE NANOPARTICLE, AND INK COMPOSITION, LIGHT-EMITTING DEVICE, ELECTRONIC APPARATUS, AND ELECTRONIC EQUIPMENT INCLUDING THE NANOCOMPOSITE [patent_app_type] => utility [patent_app_number] => 18/512784 [patent_app_country] => US [patent_app_date] => 2023-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23712 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18512784 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/512784
Metal oxide nanoparticle, nanocomposite including the metal oxide nanoparticle, and ink composition, light-emitting device, electronic apparatus, and electronic equipment including the nanocomposite Nov 16, 2023 Issued
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