Search

Bac H. Au

Examiner (ID: 17152, Phone: (571)272-8795 , Office: P/2822 )

Most Active Art Unit
2822
Art Unit(s)
2822, 2898
Total Applications
1269
Issued Applications
989
Pending Applications
82
Abandoned Applications
214

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20276510 [patent_doc_number] => 12446299 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-14 [patent_title] => Combined MOS/MIS capacitor assembly [patent_app_type] => utility [patent_app_number] => 17/969835 [patent_app_country] => US [patent_app_date] => 2022-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1199 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17969835 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/969835
Combined MOS/MIS capacitor assembly Oct 19, 2022 Issued
Array ( [id] => 18361006 [patent_doc_number] => 20230142597 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => METHOD OF PRODUCING AN INTEGRATED CIRCUIT CHIP INCLUDING A BACK-SIDE POWER DELIVERY NETWORK [patent_app_type] => utility [patent_app_number] => 18/048005 [patent_app_country] => US [patent_app_date] => 2022-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4568 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 407 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18048005 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/048005
Method of producing an integrated circuit chip including a back-side power delivery network Oct 18, 2022 Issued
Array ( [id] => 19966871 [patent_doc_number] => 12336411 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-17 [patent_title] => Display device [patent_app_type] => utility [patent_app_number] => 18/047264 [patent_app_country] => US [patent_app_date] => 2022-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 36 [patent_no_of_words] => 15680 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18047264 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/047264
Display device Oct 16, 2022 Issued
Array ( [id] => 18311283 [patent_doc_number] => 20230115183 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => IMAGE SENSOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/938840 [patent_app_country] => US [patent_app_date] => 2022-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6253 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17938840 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/938840
Image sensor device Oct 6, 2022 Issued
Array ( [id] => 19086149 [patent_doc_number] => 20240112950 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/937464 [patent_app_country] => US [patent_app_date] => 2022-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3642 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17937464 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/937464
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Oct 2, 2022 Issued
Array ( [id] => 20080914 [patent_doc_number] => 12354992 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => First layer interconnect first on carrier approach for EMIB patch [patent_app_type] => utility [patent_app_number] => 17/958296 [patent_app_country] => US [patent_app_date] => 2022-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 19 [patent_no_of_words] => 1143 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 451 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17958296 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/958296
First layer interconnect first on carrier approach for EMIB patch Sep 29, 2022 Issued
Array ( [id] => 20720210 [patent_doc_number] => 12635482 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-19 [patent_title] => Method of forming a pattern of semiconductor device of a semiconductor device on a semiconductor substrate by using an extreme ultraviolet mask [patent_app_type] => utility [patent_app_number] => 17/956919 [patent_app_country] => US [patent_app_date] => 2022-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 1168 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17956919 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/956919
Method of forming a pattern of semiconductor device of a semiconductor device on a semiconductor substrate by using an extreme ultraviolet mask Sep 29, 2022 Issued
Array ( [id] => 19071172 [patent_doc_number] => 20240105598 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => DIFFERENTIATED CONDUCTIVE LINES FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION [patent_app_type] => utility [patent_app_number] => 17/954201 [patent_app_country] => US [patent_app_date] => 2022-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15972 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17954201 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/954201
DIFFERENTIATED CONDUCTIVE LINES FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION Sep 26, 2022 Pending
Array ( [id] => 20612842 [patent_doc_number] => 12588462 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-24 [patent_title] => Semiconductor structure and fabrication method thereof [patent_app_type] => utility [patent_app_number] => 17/953285 [patent_app_country] => US [patent_app_date] => 2022-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 0 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17953285 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/953285
Semiconductor structure and fabrication method thereof Sep 25, 2022 Issued
Array ( [id] => 18165045 [patent_doc_number] => 20230031642 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => Germanium-Silicon-Tin (GeSiSn) Heterojunction Bipolar Transistor Devices [patent_app_type] => utility [patent_app_number] => 17/952343 [patent_app_country] => US [patent_app_date] => 2022-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 47458 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17952343 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/952343
Germanium-Silicon-Tin (GeSiSn) Heterojunction Bipolar Transistor Devices Sep 25, 2022 Pending
Array ( [id] => 18237552 [patent_doc_number] => 20230069862 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/901346 [patent_app_country] => US [patent_app_date] => 2022-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5083 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17901346 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/901346
METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT Aug 31, 2022 Pending
Array ( [id] => 18959014 [patent_doc_number] => 20240047341 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => Via Resistance Reduction [patent_app_type] => utility [patent_app_number] => 17/880359 [patent_app_country] => US [patent_app_date] => 2022-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6968 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17880359 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/880359
Via resistance reduction Aug 2, 2022 Issued
Array ( [id] => 20531913 [patent_doc_number] => 12550364 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-10 [patent_title] => Semiconductor device structure and methods of forming the same [patent_app_type] => utility [patent_app_number] => 17/877970 [patent_app_country] => US [patent_app_date] => 2022-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 29 [patent_no_of_words] => 2273 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17877970 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/877970
Semiconductor device structure and methods of forming the same Jul 30, 2022 Issued
Array ( [id] => 19341422 [patent_doc_number] => 12051617 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-30 [patent_title] => Method of making a semiconductor device and semiconductor device [patent_app_type] => utility [patent_app_number] => 17/816051 [patent_app_country] => US [patent_app_date] => 2022-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7680 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17816051 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/816051
Method of making a semiconductor device and semiconductor device Jul 28, 2022 Issued
Array ( [id] => 20244154 [patent_doc_number] => 12424485 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-23 [patent_title] => Semiconductor structure with air gap and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/875625 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 3236 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17875625 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/875625
Semiconductor structure with air gap and method for manufacturing the same Jul 27, 2022 Issued
Array ( [id] => 18040059 [patent_doc_number] => 20220384276 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => Semiconductor Device and Method [patent_app_type] => utility [patent_app_number] => 17/876083 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12543 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17876083 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/876083
Semiconductor device and method Jul 27, 2022 Issued
Array ( [id] => 18943700 [patent_doc_number] => 20240038839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/815854 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9890 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17815854 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/815854
Semiconductor device structure and method for forming the same Jul 27, 2022 Issued
Array ( [id] => 18008431 [patent_doc_number] => 20220367198 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => Semiconductor Device and Method [patent_app_type] => utility [patent_app_number] => 17/874694 [patent_app_country] => US [patent_app_date] => 2022-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11600 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17874694 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/874694
Semiconductor device and method Jul 26, 2022 Issued
Array ( [id] => 19356990 [patent_doc_number] => 12057447 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-06 [patent_title] => Three dimensional integrated circuit and fabrication thereof [patent_app_type] => utility [patent_app_number] => 17/874176 [patent_app_country] => US [patent_app_date] => 2022-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 40 [patent_no_of_words] => 13900 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17874176 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/874176
Three dimensional integrated circuit and fabrication thereof Jul 25, 2022 Issued
Array ( [id] => 17993611 [patent_doc_number] => 20220359648 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => GUARD RING AND CIRCUIT DEVICE [patent_app_type] => utility [patent_app_number] => 17/815004 [patent_app_country] => US [patent_app_date] => 2022-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6134 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17815004 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/815004
Guard ring and circuit device Jul 25, 2022 Issued
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