
Bai Duc Vu
Examiner (ID: 11085, Phone: (571)270-1751 , Office: P/2165 )
| Most Active Art Unit | 2165 |
| Art Unit(s) | 2162, 2165, 2163 |
| Total Applications | 819 |
| Issued Applications | 614 |
| Pending Applications | 49 |
| Abandoned Applications | 169 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9446378
[patent_doc_number] => 20140117546
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-05-01
[patent_title] => 'HYBRID BONDING MECHANISMS FOR SEMICONDUCTOR WAFERS'
[patent_app_type] => utility
[patent_app_number] => 13/664796
[patent_app_country] => US
[patent_app_date] => 2012-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 6431
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13664796
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/664796 | Hybrid bonding mechanisms for semiconductor wafers | Oct 30, 2012 | Issued |
Array
(
[id] => 10060057
[patent_doc_number] => 09099421
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-08-04
[patent_title] => 'Surface profile for semiconductor region'
[patent_app_type] => utility
[patent_app_number] => 13/665159
[patent_app_country] => US
[patent_app_date] => 2012-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 4758
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13665159
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/665159 | Surface profile for semiconductor region | Oct 30, 2012 | Issued |
Array
(
[id] => 8788851
[patent_doc_number] => 20130105820
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-02
[patent_title] => 'TRENCH TYPE SCHOTTKY JUNCTION SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/665311
[patent_app_country] => US
[patent_app_date] => 2012-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13665311
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/665311 | Trench type Schottky junction semiconductor device and manufacturing method thereof | Oct 30, 2012 | Issued |
Array
(
[id] => 9446252
[patent_doc_number] => 20140117420
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-05-01
[patent_title] => 'SEMICONDUCTOR STRUCTURE INCORPORATING A CONTACT SIDEWALL SPACER WITH A SELF-ALIGNED AIRGAP AND A METHOD OF FORMING THE SEMICONDUCTOR STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 13/664784
[patent_app_country] => US
[patent_app_date] => 2012-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 11078
[patent_no_of_claims] => 26
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[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13664784
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/664784 | Semiconductor structure incorporating a contact sidewall spacer with a self-aligned airgap and a method of forming the semiconductor structure | Oct 30, 2012 | Issued |
Array
(
[id] => 9250358
[patent_doc_number] => 08614136
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-12-24
[patent_title] => 'Techniques for fabricating janus MEMS transistors'
[patent_app_type] => utility
[patent_app_number] => 13/665334
[patent_app_country] => US
[patent_app_date] => 2012-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 9207
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13665334
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/665334 | Techniques for fabricating janus MEMS transistors | Oct 30, 2012 | Issued |
Array
(
[id] => 9266583
[patent_doc_number] => 20140021499
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-01-23
[patent_title] => 'FLEXIBLE DISPLAY APPARATUS AND METHOD OF FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/664375
[patent_app_country] => US
[patent_app_date] => 2012-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13664375
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/664375 | Flexible display apparatus and method of fabricating the same | Oct 29, 2012 | Issued |
Array
(
[id] => 9446143
[patent_doc_number] => 20140117311
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-05-01
[patent_title] => 'SEMICONDUCTOR STRUCTURE HAVING NANOCRYSTALLINE CORE AND NANOCRYSTALLINE SHELL PAIRING WITH COMPOSITIONAL TRANSITION LAYER'
[patent_app_type] => utility
[patent_app_number] => 13/663300
[patent_app_country] => US
[patent_app_date] => 2012-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 16653
[patent_no_of_claims] => 75
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13663300
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/663300 | SEMICONDUCTOR STRUCTURE HAVING NANOCRYSTALLINE CORE AND NANOCRYSTALLINE SHELL PAIRING WITH COMPOSITIONAL TRANSITION LAYER | Oct 28, 2012 | Abandoned |
Array
(
[id] => 9446353
[patent_doc_number] => 20140117521
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-05-01
[patent_title] => 'SEMICONDUCTOR DEVICE WITH THERMAL DISSIPATION LEAD FRAME'
[patent_app_type] => utility
[patent_app_number] => 13/663462
[patent_app_country] => US
[patent_app_date] => 2012-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4329
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13663462
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/663462 | Semiconductor device with thermal dissipation lead frame | Oct 28, 2012 | Issued |
Array
(
[id] => 9184315
[patent_doc_number] => 08624252
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-01-07
[patent_title] => 'Substrate having film pattern and manufacturing method of the same, manufacturing method of semiconductor device, liquid crystal television, and el television'
[patent_app_type] => utility
[patent_app_number] => 13/612146
[patent_app_country] => US
[patent_app_date] => 2012-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 34
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13612146
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/612146 | Substrate having film pattern and manufacturing method of the same, manufacturing method of semiconductor device, liquid crystal television, and el television | Sep 11, 2012 | Issued |
Array
(
[id] => 8680937
[patent_doc_number] => 20130049221
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-02-28
[patent_title] => 'SEMICONDUCTOR PACKAGE HAVING PLURAL SEMICONDUCTOR CHIPS AND METHOD OF FORMING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/534212
[patent_app_country] => US
[patent_app_date] => 2012-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 6598
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13534212
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/534212 | Semiconductor package having plural semiconductor chips and method of forming the same | Jun 26, 2012 | Issued |
Array
(
[id] => 8582981
[patent_doc_number] => 20130001802
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-01-03
[patent_title] => 'SEMICONDUCTOR DEVICE INCLUDING INSULATING RESIN FILM PROVIDED IN A SPACE BETWEEN SEMICONDUCTOR CHIPS'
[patent_app_type] => utility
[patent_app_number] => 13/533510
[patent_app_country] => US
[patent_app_date] => 2012-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
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[patent_no_of_words] => 11869
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/533510 | SEMICONDUCTOR DEVICE INCLUDING INSULATING RESIN FILM PROVIDED IN A SPACE BETWEEN SEMICONDUCTOR CHIPS | Jun 25, 2012 | Abandoned |
Array
(
[id] => 8777414
[patent_doc_number] => 20130099389
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-04-25
[patent_title] => 'MULTILAYERED CIRCUIT TYPE ANTENNA PACKAGE'
[patent_app_type] => utility
[patent_app_number] => 13/531120
[patent_app_country] => US
[patent_app_date] => 2012-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/531120 | Multilayered circuit type antenna package | Jun 21, 2012 | Issued |
Array
(
[id] => 9274054
[patent_doc_number] => 08637988
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-01-28
[patent_title] => 'Semiconductor device and method of testing the same'
[patent_app_type] => utility
[patent_app_number] => 13/525707
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/525707 | Semiconductor device and method of testing the same | Jun 17, 2012 | Issued |
Array
(
[id] => 8506557
[patent_doc_number] => 20120305965
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-12-06
[patent_title] => 'LIGHT EMITTING DIODE SUBSTRATE AND LIGHT EMITTING DIODE'
[patent_app_type] => utility
[patent_app_number] => 13/472480
[patent_app_country] => US
[patent_app_date] => 2012-05-16
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/472480 | Light emitting diode substrate and light emitting diode | May 15, 2012 | Issued |
Array
(
[id] => 9677525
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[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-08-26
[patent_title] => 'Method and structure for forming fin resistors'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/472605 | Method and structure for forming fin resistors | May 15, 2012 | Issued |
Array
(
[id] => 9154150
[patent_doc_number] => 08587057
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[patent_issue_date] => 2013-11-19
[patent_title] => 'Metal oxide semiconductor field transistor'
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[patent_app_number] => 13/471469
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/471469 | Metal oxide semiconductor field transistor | May 14, 2012 | Issued |
Array
(
[id] => 10888594
[patent_doc_number] => 08912590
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[patent_issue_date] => 2014-12-16
[patent_title] => 'Semiconductor device including monos-type memory cell'
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[patent_app_number] => 13/471949
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/471949 | Semiconductor device including monos-type memory cell | May 14, 2012 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/472310 | Semiconductor light emitting device and method for manufacturing same | May 14, 2012 | Issued |
Array
(
[id] => 9888870
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[patent_title] => 'Thin film transistor, array substrate and preparation method thereof'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/471911 | Thin film transistor, array substrate and preparation method thereof | May 14, 2012 | Issued |
Array
(
[id] => 9145382
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[patent_title] => 'BUTTED CONTACT SHAPE TO IMPROVE SRAM LEAKAGE CURRENT'
[patent_app_type] => utility
[patent_app_number] => 13/470496
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/470496 | Butted contact shape to improve SRAM leakage current | May 13, 2012 | Issued |